Index: avr-libc/include/avr/wdt.h
===================================================================
--- avr-libc/include/avr/wdt.h	(revision 2462)
+++ avr-libc/include/avr/wdt.h	(working copy)
@@ -228,6 +228,176 @@
 ); \
 }while(0)
 
+#elif defined(CCP)
+
+static __inline__
+__attribute__ ((__always_inline__))
+void wdt_enable (const uint8_t value)
+{
+	if (!_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P (_WD_CONTROL_REG))
+	{
+		__asm__ __volatile__ (
+			"in __tmp_reg__,__SREG__" "\n\t"
+			"cli" "\n\t"
+			"wdr" "\n\t"
+			"sts %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+			"sts %[WDTREG],%[WDVALUE]" "\n\t"
+			"out __SREG__,__tmp_reg__" "\n\t"
+			: /* no outputs */
+			: [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)),
+			[SIGNATURE] "r" ((uint8_t)0xD8),
+			[WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
+			[WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
+				| _BV(WDE) | (value & 0x07) ))
+			: "r0"
+			);
+	}
+	else if (!_SFR_IO_REG_P (CCP) && _SFR_IO_REG_P (_WD_CONTROL_REG))
+	{
+		__asm__ __volatile__ (
+			"in __tmp_reg__,__SREG__" "\n\t"
+			"cli" "\n\t"
+			"wdr" "\n\t"
+			"sts %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+			"out %[WDTREG],%[WDVALUE]" "\n\t"
+			"out __SREG__,__tmp_reg__" "\n\t"
+			: /* no outputs */
+			: [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)),
+			[SIGNATURE] "r" ((uint8_t)0xD8),
+			[WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
+			[WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
+				| _BV(WDE) | (value & 0x07) ))
+			: "r0"
+			);
+	}
+	else if (_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P (_WD_CONTROL_REG))
+	{
+		__asm__ __volatile__ (
+			"in __tmp_reg__,__SREG__" "\n\t"
+			"cli" "\n\t"
+			"wdr" "\n\t"
+			"out %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+			"sts %[WDTREG],%[WDVALUE]" "\n\t"
+			"out __SREG__,__tmp_reg__" "\n\t"
+			: /* no outputs */
+			: [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)),
+			[SIGNATURE] "r" ((uint8_t)0xD8),
+			[WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
+			[WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
+				| _BV(WDE) | (value & 0x07) ))
+			: "r0"
+			);
+	}
+	else
+ 	{
+		__asm__ __volatile__ (
+			"in __tmp_reg__,__SREG__" "\n\t"
+			"cli" "\n\t"
+			"wdr" "\n\t"
+			"out %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+			"out %[WDTREG],%[WDVALUE]" "\n\t"
+			"out __SREG__,__tmp_reg__" "\n\t"
+			: /* no outputs */
+			: [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)),
+			[SIGNATURE] "r" ((uint8_t)0xD8),
+			[WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
+			[WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
+				| _BV(WDE) | (value & 0x07) ))
+			: "r0"
+			);
+	}
+}
+
+static __inline__
+__attribute__ ((__always_inline__))
+void wdt_disable (void)
+{
+	if (!_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P(_WD_CONTROL_REG))
+	{
+        uint8_t temp_wd;
+        __asm__ __volatile__ (
+				"in __tmp_reg__,__SREG__" "\n\t"
+				"cli" "\n\t"
+				"wdr" "\n\t"
+				"sts %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+				"lds %[TEMP_WD],%[WDTREG]" "\n\t"
+				"cbr %[TEMP_WD],%[WDVALUE]" "\n\t"
+				"sts %[WDTREG],%[TEMP_WD]" "\n\t"
+				"out __SREG__,__tmp_reg__" "\n\t"
+				: /*no output */
+				: [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)),
+				[SIGNATURE] "r" ((uint8_t)0xD8),
+				[WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
+				[TEMP_WD] "d" (temp_wd),
+				[WDVALUE] "I" (1 << WDE)
+				: "r0"
+				);
+	}
+	else if (!_SFR_IO_REG_P (CCP) && _SFR_IO_REG_P(_WD_CONTROL_REG))
+	{
+        uint8_t temp_wd;
+        __asm__ __volatile__ (
+				"in __tmp_reg__,__SREG__" "\n\t"
+				"cli" "\n\t"
+				"wdr" "\n\t"
+				"sts %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+				"in %[TEMP_WD],%[WDTREG]" "\n\t"
+				"cbr %[TEMP_WD],%[WDVALUE]" "\n\t"
+				"out %[WDTREG],%[TEMP_WD]" "\n\t"
+				"out __SREG__,__tmp_reg__" "\n\t"
+				: /*no output */
+				: [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)),
+				[SIGNATURE] "r" ((uint8_t)0xD8),
+				[WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
+				[TEMP_WD] "d" (temp_wd),
+				[WDVALUE] "I" (1 << WDE)
+				: "r0"
+				);
+	}
+	else if (_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P(_WD_CONTROL_REG))
+	{
+        uint8_t temp_wd;
+        __asm__ __volatile__ (
+				"in __tmp_reg__,__SREG__" "\n\t"
+				"cli" "\n\t"
+				"wdr" "\n\t"
+				"out %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+				"lds %[TEMP_WD],%[WDTREG]" "\n\t"
+				"cbr %[TEMP_WD],%[WDVALUE]" "\n\t"
+				"sts %[WDTREG],%[TEMP_WD]" "\n\t"
+				"out __SREG__,__tmp_reg__" "\n\t"
+				: /*no output */
+				: [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)),
+				[SIGNATURE] "r" ((uint8_t)0xD8),
+				[WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
+				[TEMP_WD] "d" (temp_wd),
+				[WDVALUE] "I" (1 << WDE)
+				: "r0"
+				);
+	}
+	else
+	{
+        uint8_t temp_wd;
+        __asm__ __volatile__ (
+				"in __tmp_reg__,__SREG__" "\n\t"
+				"cli" "\n\t"
+				"wdr" "\n\t"
+				"out %[CCPADDRESS],%[SIGNATURE]" "\n\t"
+				"in %[TEMP_WD],%[WDTREG]" "\n\t"
+				"cbr %[TEMP_WD],%[WDVALUE]" "\n\t"
+				"out %[WDTREG],%[TEMP_WD]" "\n\t"
+				"out __SREG__,__tmp_reg__" "\n\t"
+				: /*no output */
+				: [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)),
+				[SIGNATURE] "r" ((uint8_t)0xD8),
+				[WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
+				[TEMP_WD] "d" (temp_wd),
+				[WDVALUE] "I" (1 << WDE)
+				: "r0"
+				);
+	}
+}
+
 #else
 
 static __inline__
