Index: avr-libc/include/avr/io90pwm216.h
===================================================================
--- avr-libc/include/avr/io90pwm216.h	(revision 2450)
+++ avr-libc/include/avr/io90pwm216.h	(working copy)
@@ -434,7 +434,8 @@
 /* Power Reduction Register */
 #define PRR     _SFR_MEM8(0x64)
 #define PRADC   0   /* Power Reduction ADC */
-#define PRUSART 1   /* Power Reduction USART */
+#define PRUSART PRUSART0   /* Power Reduction USART */
+#define PRUSART0 1   /* Power Reduction USART */
 #define PRSPI   2   /* Power Reduction Serial Peripheral Interface */
 #define PRTIM0  3   /* Power Reduction Timer/Counter0 */
 #define PRTIM1  4   /* Power Reduction Timer/Counter1 */
Index: avr-libc/include/avr/io90pwm316.h
===================================================================
--- avr-libc/include/avr/io90pwm316.h	(revision 2450)
+++ avr-libc/include/avr/io90pwm316.h	(working copy)
@@ -434,7 +434,8 @@
 /* Power Reduction Register */
 #define PRR     _SFR_MEM8(0x64)
 #define PRADC   0   /* Power Reduction ADC */
-#define PRUSART 1   /* Power Reduction USART */
+#define PRUSART PRUSART0   /* Define to maintain compatibility */
+#define PRUSART0 1   /* Power Reduction USART */
 #define PRSPI   2   /* Power Reduction Serial Peripheral Interface */
 #define PRTIM0  3   /* Power Reduction Timer/Counter0 */
 #define PRTIM1  4   /* Power Reduction Timer/Counter1 */
Index: avr-libc/include/avr/io90pwmx.h
===================================================================
--- avr-libc/include/avr/io90pwmx.h	(revision 2450)
+++ avr-libc/include/avr/io90pwmx.h	(working copy)
@@ -492,7 +492,8 @@
 #define PRTIM1  4   /* Power Reduction Timer/Counter1 */
 #define PRTIM0  3   /* Power Reduction Timer/Counter0 */
 #define PRSPI   2   /* Power Reduction Serial Peripheral Interface */
-#define PRUSART 1   /* Power Reduction USART */
+#define PRUSART PRUSART0   /* Define to maintain backward-compatibility */
+#define PRUSART0 1   /* Power Reduction USART */
 #define PRADC   0   /* Power Reduction ADC */
 
 /* Oscillator Calibration Value */
Index: avr-libc/include/avr/iom128.h
===================================================================
--- avr-libc/include/avr/iom128.h	(revision 2450)
+++ avr-libc/include/avr/iom128.h	(working copy)
@@ -1242,6 +1242,7 @@
 
 #pragma GCC system_header
 
+#pragma GCC poison ADCW
 #pragma GCC poison MCUSR
 #pragma GCC poison SPMCR
 
Index: avr-libc/include/avr/iom165.h
===================================================================
--- avr-libc/include/avr/iom165.h	(revision 2450)
+++ avr-libc/include/avr/iom165.h	(working copy)
@@ -836,7 +836,7 @@
 /* Signature */
 #define SIGNATURE_0 0x1E
 #define SIGNATURE_1 0x94
-#define SIGNATURE_2 0x07
+#define SIGNATURE_2 0x05
 
 
 /* Deprecated items */
Index: avr-libc/include/avr/iom16hvb.h
===================================================================
--- avr-libc/include/avr/iom16hvb.h	(revision 2450)
+++ avr-libc/include/avr/iom16hvb.h	(working copy)
@@ -970,10 +970,10 @@
 #define VREF_PIN   PINVREF
 #define VREF_BIT   VREF
 
-#define VREF_DDR   DDRVREFGND
-#define VREF_PORT  PORTVREFGND
-#define VREF_PIN   PINVREFGND
-#define VREF_BIT   VREFGND
+#define VREFGND_DDR   DDRVREFGND
+#define VREFGND_PORT  PORTVREFGND
+#define VREFGND_PIN   PINVREFGND
+#define VREFGND_BIT   VREFGND
 
 #define PI_DDR   DDRI
 #define PI_PORT  PORTI
Index: avr-libc/include/avr/iom16u2.h
===================================================================
--- avr-libc/include/avr/iom16u2.h	(revision 2450)
+++ avr-libc/include/avr/iom16u2.h	(working copy)
@@ -474,6 +474,12 @@
 #define DIDR1 _SFR_MEM8(0x7F)
 #define AIN0D 0
 #define AIN1D 1
+#define AIN2D 2
+#define AIN3D 3
+#define AIN4D 4
+#define AIN5D 5
+#define AIN6D 6
+#define AIN7D 7
 
 #define TCCR1A _SFR_MEM8(0x80)
 #define WGM10 0
Index: avr-libc/include/avr/iom32hvb.h
===================================================================
--- avr-libc/include/avr/iom32hvb.h	(revision 2450)
+++ avr-libc/include/avr/iom32hvb.h	(working copy)
@@ -970,10 +970,10 @@
 #define VREF_PIN   PINVREF
 #define VREF_BIT   VREF
 
-#define VREF_DDR   DDRVREFGND
-#define VREF_PORT  PORTVREFGND
-#define VREF_PIN   PINVREFGND
-#define VREF_BIT   VREFGND
+#define VREFGND_DDR   DDRVREFGND
+#define VREFGND_PORT  PORTVREFGND
+#define VREFGND_PIN   PINVREFGND
+#define VREFGND_BIT   VREFGND
 
 #define PI_DDR   DDRI
 #define PI_PORT  PORTI
Index: avr-libc/include/avr/iom32u2.h
===================================================================
--- avr-libc/include/avr/iom32u2.h	(revision 2450)
+++ avr-libc/include/avr/iom32u2.h	(working copy)
@@ -474,6 +474,12 @@
 #define DIDR1 _SFR_MEM8(0x7F)
 #define AIN0D 0
 #define AIN1D 1
+#define AIN2D 2
+#define AIN3D 3
+#define AIN4D 4
+#define AIN5D 5
+#define AIN6D 6
+#define AIN7D 7
 
 #define TCCR1A _SFR_MEM8(0x80)
 #define WGM10 0
Index: avr-libc/include/avr/iom8u2.h
===================================================================
--- avr-libc/include/avr/iom8u2.h	(revision 2450)
+++ avr-libc/include/avr/iom8u2.h	(working copy)
@@ -474,6 +474,12 @@
 #define DIDR1 _SFR_MEM8(0x7F)
 #define AIN0D 0
 #define AIN1D 1
+#define AIN2D 2
+#define AIN3D 3
+#define AIN4D 4
+#define AIN5D 5
+#define AIN6D 6
+#define AIN7D 7
 
 #define TCCR1A _SFR_MEM8(0x80)
 #define WGM10 0
Index: avr-libc/include/avr/iomx8.h
===================================================================
--- avr-libc/include/avr/iomx8.h	(revision 2450)
+++ avr-libc/include/avr/iomx8.h	(working copy)
@@ -305,10 +305,13 @@
 #define SPMCSR  _SFR_IO8 (0x37)
 /* SPMCSR */
 #define SPMIE     7
-#if defined (__AVR_ATmega88__) || defined (__AVR_ATmega168__)
+#if defined (__AVR_ATmega88__) || defined (__AVR_ATmega168__) || (__AVR_ATmega88P__) || defined (__AVR_ATmega168P__) || (__AVR_ATmega88A__) || defined (__AVR_ATmega168A__) || (__AVR_ATmega88PA__) || defined (__AVR_ATmega168PA__)
 #  define RWWSB   6
 #  define RWWSRE  4
 #endif
+#if defined(__AVR_ATmega48A) || defined(__AVR_ATmega48PA) || defined(__AVR_ATmega88A) || defined(__AVR_ATmega88PA) || defined(__AVR_ATmega168A) || defined(__AVR_ATmega168PA)
+	#define SIGRD 5
+#endif
 #define BLBSET    3
 #define PGWRT     2
 #define PGERS     1
Index: avr-libc/include/avr/iotn13a.h
===================================================================
--- avr-libc/include/avr/iotn13a.h	(revision 2450)
+++ avr-libc/include/avr/iotn13a.h	(working copy)
@@ -149,8 +149,10 @@
 
 #define EECR _SFR_IO8(0x1C)
 #define EERE 0
-#define EEPE 1
-#define EEMPE 2
+#define EEPE EEWE
+#define EEWE 1
+#define EEMPE EEMWE
+#define EEMWE 2
 #define EERIE 3
 #define EEPM0 4
 #define EEPM1 5
Index: avr-libc/include/avr/iotn167.h
===================================================================
--- avr-libc/include/avr/iotn167.h	(revision 2450)
+++ avr-libc/include/avr/iotn167.h	(working copy)
@@ -472,9 +472,9 @@
 #define ADC7D 7
 
 #define DIDR1 _SFR_MEM8(0x7F)
-#define ADC8D 0
-#define ADC9D 1
-#define ADC10D 2
+#define ADC8D 4
+#define ADC9D 5
+#define ADC10D 6
 
 #define TCCR1A _SFR_MEM8(0x80)
 #define WGM10 0
Index: avr-libc/include/avr/iotn87.h
===================================================================
--- avr-libc/include/avr/iotn87.h	(revision 2450)
+++ avr-libc/include/avr/iotn87.h	(working copy)
@@ -471,9 +471,9 @@
 #define ADC7D 7
 
 #define DIDR1 _SFR_MEM8(0x7F)
-#define ADC8D 0
-#define ADC9D 1
-#define ADC10D 2
+#define ADC8D 4
+#define ADC9D 5
+#define ADC10D 6
 
 #define TCCR1A _SFR_MEM8(0x80)
 #define WGM10 0
Index: avr-libc/include/avr/iox128d3.h
===================================================================
--- avr-libc/include/avr/iox128d3.h	(revision 2450)
+++ avr-libc/include/avr/iox128d3.h	(working copy)
@@ -1045,6 +1045,15 @@
     ADC_CH_t CH0;  /* ADC Channel 0 */
 } ADC_t;
 
+/* Current Limitation */
+typedef enum ADC_CURRLIMIT_enum
+{
+    ADC_CURRLIMIT_NO_gc = (0x00<<5),  /* No current limit,     300ksps max sampling rate */
+    ADC_CURRLIMIT_LOW_gc = (0x01<<5),  /* Low current limit,    225ksps max sampling rate */
+    ADC_CURRLIMIT_MED_gc = (0x02<<5),  /* Medium current limit, 150ksps max sampling rate */
+    ADC_CURRLIMIT_HIGH_gc = (0x03<<5),  /* High current limit,   75ksps max sampling rate */
+} ADC_CURRLIMIT_t;
+
 /* Positive input multiplexer selection */
 typedef enum ADC_CH_MUXPOS_enum
 {
@@ -1099,6 +1108,7 @@
     ADC_CH_GAIN_16X_gc = (0x04<<2),  /* 16x gain */
     ADC_CH_GAIN_32X_gc = (0x05<<2),  /* 32x gain */
     ADC_CH_GAIN_64X_gc = (0x06<<2),  /* 64x gain */
+    ADC_CH_GAIN_DIV2_gc = (0x07<<2),  /* x/2 gain */		
 } ADC_CH_GAIN_t;
 
 /* Conversion result resolution */
@@ -2227,6 +2237,7 @@
 #define ACA    (*(AC_t *) 0x0380)  /* Analog Comparator A */
 #define RTC    (*(RTC_t *) 0x0400)  /* Real-Time Counter */
 #define TWIC    (*(TWI_t *) 0x0480)  /* Two-Wire Interface C */
+#define TWIE    (*(TWI_t *) 0x04A0)  /* Two-Wire Interface E */
 #define PORTA    (*(PORT_t *) 0x0600)  /* Port A */
 #define PORTB    (*(PORT_t *) 0x0620)  /* Port B */
 #define PORTC    (*(PORT_t *) 0x0640)  /* Port C */
@@ -2472,6 +2483,22 @@
 #define TWIC_SLAVE_DATA  _SFR_MEM8(0x048C)
 #define TWIC_SLAVE_ADDRMASK  _SFR_MEM8(0x048D)
 
+/* TWIE - Two-Wire Interface E */
+#define TWIE_CTRL  _SFR_MEM8(0x04A0)
+#define TWIE_MASTER_CTRLA  _SFR_MEM8(0x04A1)
+#define TWIE_MASTER_CTRLB  _SFR_MEM8(0x04A2)
+#define TWIE_MASTER_CTRLC  _SFR_MEM8(0x04A3)
+#define TWIE_MASTER_STATUS  _SFR_MEM8(0x04A4)
+#define TWIE_MASTER_BAUD  _SFR_MEM8(0x04A5)
+#define TWIE_MASTER_ADDR  _SFR_MEM8(0x04A6)
+#define TWIE_MASTER_DATA  _SFR_MEM8(0x04A7)
+#define TWIE_SLAVE_CTRLA  _SFR_MEM8(0x04A8)
+#define TWIE_SLAVE_CTRLB  _SFR_MEM8(0x04A9)
+#define TWIE_SLAVE_STATUS  _SFR_MEM8(0x04AA)
+#define TWIE_SLAVE_ADDR  _SFR_MEM8(0x04AB)
+#define TWIE_SLAVE_DATA  _SFR_MEM8(0x04AC)
+#define TWIE_SLAVE_ADDRMASK  _SFR_MEM8(0x04AD)
+
 /* PORTA - Port A */
 #define PORTA_DIR  _SFR_MEM8(0x0600)
 #define PORTA_DIRSET  _SFR_MEM8(0x0601)
@@ -3949,6 +3976,13 @@
 
 
 /* ADC.CTRLB  bit masks and bit positions */
+#define ADC_CURRLIMIT_gm  0x60  /* Current Limitation group mask. */
+#define ADC_CURRLIMIT_gp  5  /* Current Limitation group position. */
+#define ADC_CURRLIMIT0_bm  (1<<5)  /* Current Limitation bit 0 mask. */
+#define ADC_CURRLIMIT0_bp  5  /* Current Limitation bit 0 position. */
+#define ADC_CURRLIMIT1_bm  (1<<6)  /* Current Limitation bit 1 mask. */
+#define ADC_CURRLIMIT1_bp  6  /* Current Limitation bit 1 position. */
+
 #define ADC_CONMODE_bm  0x10  /* Conversion Mode bit mask. */
 #define ADC_CONMODE_bp  4  /* Conversion Mode bit position. */
 
@@ -5416,6 +5450,12 @@
 #define PORTE_INT1_vect_num  44
 #define PORTE_INT1_vect      _VECTOR(44)  /* External Interrupt 1 */
 
+/* TWIE interrupt vectors */
+#define TWIE_TWIS_vect_num  45
+#define TWIE_TWIS_vect      _VECTOR(45)  /* TWI Slave Interrupt */
+#define TWIE_TWIM_vect_num  46
+#define TWIE_TWIM_vect      _VECTOR(46)  /* TWI Master Interrupt */
+
 /* TCE0 interrupt vectors */
 #define TCE0_OVF_vect_num  47
 #define TCE0_OVF_vect      _VECTOR(47)  /* Overflow Interrupt */
Index: avr-libc/include/avr/iox128d4.h
===================================================================
--- avr-libc/include/avr/iox128d4.h	(revision 2450)
+++ avr-libc/include/avr/iox128d4.h	(working copy)
@@ -939,10 +939,6 @@
     ADC_CH_MUXPOS_PIN9_gc = (0x09<<3),  /* Input pin 9 */
     ADC_CH_MUXPOS_PIN10_gc = (0x0A<<3),  /* Input pin 10 */
     ADC_CH_MUXPOS_PIN11_gc = (0x0B<<3),  /* Input pin 11 */
-    ADC_CH_MUXPOS_PIN12_gc = (0x0C<<3),  /* Input pin 12 */
-    ADC_CH_MUXPOS_PIN13_gc = (0x0D<<3),  /* Input pin 13 */
-    ADC_CH_MUXPOS_PIN14_gc = (0x0E<<3),  /* Input pin 14 */
-    ADC_CH_MUXPOS_PIN15_gc = (0x0F<<3),  /* Input pin 15 */
 } ADC_CH_MUXPOS_t;
 
 /* Internal input multiplexer selections */
Index: avr-libc/include/avr/iox16d4.h
===================================================================
--- avr-libc/include/avr/iox16d4.h	(revision 2450)
+++ avr-libc/include/avr/iox16d4.h	(working copy)
@@ -434,6 +434,42 @@
 
 /*
 --------------------------------------------------------------------------
+CRC - Cyclic Redundancy Checker
+--------------------------------------------------------------------------
+*/
+
+/* Cyclic Redundancy Checker */
+typedef struct CRC_struct
+{
+    register8_t CTRL;  /* Control Register */
+    register8_t STATUS;  /* Status Register */
+    register8_t reserved_0x02;
+    register8_t DATAIN;  /* Data Input */
+    register8_t CHECKSUM0;  /* Checksum byte 0 */
+    register8_t CHECKSUM1;  /* Checksum byte 1 */
+    register8_t CHECKSUM2;  /* Checksum byte 2 */
+    register8_t CHECKSUM3;  /* Checksum byte 3 */
+} CRC_t;
+
+/* Reset */
+typedef enum CRC_RESET_enum
+{
+    CRC_RESET_NO_gc = (0x00<<6),  /* No Reset */
+    CRC_RESET_RESET0_gc = (0x02<<6),  /* Reset CRC with CHECKSUM to all zeros */
+    CRC_RESET_RESET1_gc = (0x03<<6),  /* Reset CRC with CHECKSUM to all ones */
+} CRC_RESET_t;
+
+/* Input Source */
+typedef enum CRC_SOURCE_enum
+{
+    CRC_SOURCE_DISABLE_gc = (0x00<<0),  /* Disabled */
+    CRC_SOURCE_IO_gc = (0x01<<0),  /* I/O Interface */
+    CRC_SOURCE_FLASH_gc = (0x02<<0),  /* Flash */
+} CRC_SOURCE_t;
+
+
+/*
+--------------------------------------------------------------------------
 EVSYS - Event System
 --------------------------------------------------------------------------
 */
@@ -1077,6 +1113,7 @@
     ADC_CH_GAIN_16X_gc = (0x04<<2),  /* 16x gain */
     ADC_CH_GAIN_32X_gc = (0x05<<2),  /* 32x gain */
     ADC_CH_GAIN_64X_gc = (0x06<<2),  /* 64x gain */
+    ADC_CH_GAIN_DIV2_gc = (0x07<<2),  /* x/2 gain */		
 } ADC_CH_GAIN_t;
 
 /* Conversion result resolution */
@@ -1087,6 +1124,14 @@
     ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1),  /* 12-bit left-adjusted result */
 } ADC_RESOLUTION_t;
 
+typedef enum ADC_CURRLIMIT_enum
+{
+    ADC_CURRLIMIT_NO_gc = (0x00<<5),  /* No limit */
+    ADC_CURRLIMIT_LOW_gc = (0x01<<5),  /* Low current limit, max. sampling rate 1.5MSPS */
+    ADC_CURRLIMIT_MED_gc = (0x02<<5),  /* Medium current limit, max. sampling rate 1MSPS */
+    ADC_CURRLIMIT_HIGH_gc = (0x03<<5),  /* High current limit, max. sampling rate 0.5MSPS */
+} ADC_CURRLIMIT_t;
+
 /* Voltage reference selection */
 typedef enum ADC_REFSEL_enum
 {
@@ -2204,6 +2249,7 @@
 #define ACA    (*(AC_t *) 0x0380)  /* Analog Comparator A */
 #define RTC    (*(RTC_t *) 0x0400)  /* Real-Time Counter */
 #define TWIC    (*(TWI_t *) 0x0480)  /* Two-Wire Interface C */
+#define TWIE    (*(TWI_t *) 0x04A0)  /* Two-Wire Interface E */
 #define PORTA    (*(PORT_t *) 0x0600)  /* Port A */
 #define PORTB    (*(PORT_t *) 0x0620)  /* Port B */
 #define PORTC    (*(PORT_t *) 0x0640)  /* Port C */
@@ -2454,6 +2500,23 @@
 #define TWIC_SLAVE_DATA  _SFR_MEM8(0x048C)
 #define TWIC_SLAVE_ADDRMASK  _SFR_MEM8(0x048D)
 
+/* TWIE - Two-Wire Interface E */
+#define TWIE_CTRL  _SFR_MEM8(0x04A0)
+#define TWIE_MASTER_CTRLA  _SFR_MEM8(0x04A1)
+#define TWIE_MASTER_CTRLB  _SFR_MEM8(0x04A2)
+#define TWIE_MASTER_CTRLC  _SFR_MEM8(0x04A3)
+#define TWIE_MASTER_STATUS  _SFR_MEM8(0x04A4)
+#define TWIE_MASTER_BAUD  _SFR_MEM8(0x04A5)
+#define TWIE_MASTER_ADDR  _SFR_MEM8(0x04A6)
+#define TWIE_MASTER_DATA  _SFR_MEM8(0x04A7)
+#define TWIE_SLAVE_CTRLA  _SFR_MEM8(0x04A8)
+#define TWIE_SLAVE_CTRLB  _SFR_MEM8(0x04A9)
+#define TWIE_SLAVE_STATUS  _SFR_MEM8(0x04AA)
+#define TWIE_SLAVE_ADDR  _SFR_MEM8(0x04AB)
+#define TWIE_SLAVE_DATA  _SFR_MEM8(0x04AC)
+#define TWIE_SLAVE_ADDRMASK  _SFR_MEM8(0x04AD)
+
+
 /* PORTA - Port A */
 #define PORTA_DIR  _SFR_MEM8(0x0600)
 #define PORTA_DIRSET  _SFR_MEM8(0x0601)
@@ -3841,6 +3904,8 @@
 #define ADC_CH_MUXPOS2_bp  5  /* Positive Input Select bit 2 position. */
 #define ADC_CH_MUXPOS3_bm  (1<<6)  /* Positive Input Select bit 3 mask. */
 #define ADC_CH_MUXPOS3_bp  6  /* Positive Input Select bit 3 position. */
+#define ADC_CH_MUXPOS4_bm  (1<<7)  /* Positive Input Select bit 3 mask. */
+#define ADC_CH_MUXPOS4_bp  7  /* Positive Input Select bit 3 position. */
 
 #define ADC_CH_MUXINT_gm  0x78  /* Internal Input Select group mask. */
 #define ADC_CH_MUXINT_gp  3  /* Internal Input Select group position. */
@@ -3894,6 +3959,13 @@
 
 
 /* ADC.CTRLB  bit masks and bit positions */
+#define ADC_IMPMODE_bm  0x80  /* Impedance Mode bit mask. */
+#define ADC_IMPMODE_bp  7  /* Impedance Mode bit position. */
+
+#define ADC_CURRENT_bm  0x60  /* Current bit mask. */
+#define ADC_CURRENT1_bp  6  /* Current bit position. */
+#define ADC_CURRENT0_bp  5  /* Current bit position. */
+
 #define ADC_CONMODE_bm  0x10  /* Conversion Mode bit mask. */
 #define ADC_CONMODE_bp  4  /* Conversion Mode bit position. */
 
@@ -3909,12 +3981,14 @@
 
 
 /* ADC.REFCTRL  bit masks and bit positions */
-#define ADC_REFSEL_gm  0x30  /* Reference Selection group mask. */
+#define ADC_REFSEL_gm  0x70  /* Reference Selection group mask. */
 #define ADC_REFSEL_gp  4  /* Reference Selection group position. */
 #define ADC_REFSEL0_bm  (1<<4)  /* Reference Selection bit 0 mask. */
 #define ADC_REFSEL0_bp  4  /* Reference Selection bit 0 position. */
 #define ADC_REFSEL1_bm  (1<<5)  /* Reference Selection bit 1 mask. */
 #define ADC_REFSEL1_bp  5  /* Reference Selection bit 1 position. */
+#define ADC_REFSEL2_bm  (1<<6)  /* Reference Selection bit 2 mask. */
+#define ADC_REFSEL2_bp  6  /* Reference Selection bit 2 position. */
 
 #define ADC_BANDGAP_bm  0x02  /* Bandgap enable bit mask. */
 #define ADC_BANDGAP_bp  1  /* Bandgap enable bit position. */
@@ -5367,6 +5441,12 @@
 #define PORTE_INT1_vect_num  44
 #define PORTE_INT1_vect      _VECTOR(44)  /* External Interrupt 1 */
 
+/* TWIE interrupt vectors */
+#define TWIE_TWIS_vect_num  45
+#define TWIE_TWIS_vect      _VECTOR(45)  /* TWI Slave Interrupt */
+#define TWIE_TWIM_vect_num  46
+#define TWIE_TWIM_vect      _VECTOR(46)  /* TWI Master Interrupt */
+
 /* TCE0 interrupt vectors */
 #define TCE0_OVF_vect_num  47
 #define TCE0_OVF_vect      _VECTOR(47)  /* Overflow Interrupt */
Index: avr-libc/include/avr/iox192d3.h
===================================================================
--- avr-libc/include/avr/iox192d3.h	(revision 2450)
+++ avr-libc/include/avr/iox192d3.h	(working copy)
@@ -1045,6 +1045,15 @@
     ADC_CH_t CH0;  /* ADC Channel 0 */
 } ADC_t;
 
+/* Current Limitation */
+typedef enum ADC_CURRLIMIT_enum
+{
+    ADC_CURRLIMIT_NO_gc = (0x00<<5),  /* No current limit,     300ksps max sampling rate */
+    ADC_CURRLIMIT_LOW_gc = (0x01<<5),  /* Low current limit,    225ksps max sampling rate */
+    ADC_CURRLIMIT_MED_gc = (0x02<<5),  /* Medium current limit, 150ksps max sampling rate */
+    ADC_CURRLIMIT_HIGH_gc = (0x03<<5),  /* High current limit,   75ksps max sampling rate */
+} ADC_CURRLIMIT_t;
+
 /* Positive input multiplexer selection */
 typedef enum ADC_CH_MUXPOS_enum
 {
@@ -1099,6 +1108,7 @@
     ADC_CH_GAIN_16X_gc = (0x04<<2),  /* 16x gain */
     ADC_CH_GAIN_32X_gc = (0x05<<2),  /* 32x gain */
     ADC_CH_GAIN_64X_gc = (0x06<<2),  /* 64x gain */
+    ADC_CH_GAIN_DIV2_gc = (0x07<<2),  /* x/2 gain */		
 } ADC_CH_GAIN_t;
 
 /* Conversion result resolution */
@@ -2227,6 +2237,7 @@
 #define ACA    (*(AC_t *) 0x0380)  /* Analog Comparator A */
 #define RTC    (*(RTC_t *) 0x0400)  /* Real-Time Counter */
 #define TWIC    (*(TWI_t *) 0x0480)  /* Two-Wire Interface C */
+#define TWIE    (*(TWI_t *) 0x04A0)  /* Two-Wire Interface E */
 #define PORTA    (*(PORT_t *) 0x0600)  /* Port A */
 #define PORTB    (*(PORT_t *) 0x0620)  /* Port B */
 #define PORTC    (*(PORT_t *) 0x0640)  /* Port C */
@@ -2472,6 +2483,22 @@
 #define TWIC_SLAVE_DATA  _SFR_MEM8(0x048C)
 #define TWIC_SLAVE_ADDRMASK  _SFR_MEM8(0x048D)
 
+/* TWIE - Two-Wire Interface E */
+#define TWIE_CTRL  _SFR_MEM8(0x04A0)
+#define TWIE_MASTER_CTRLA  _SFR_MEM8(0x04A1)
+#define TWIE_MASTER_CTRLB  _SFR_MEM8(0x04A2)
+#define TWIE_MASTER_CTRLC  _SFR_MEM8(0x04A3)
+#define TWIE_MASTER_STATUS  _SFR_MEM8(0x04A4)
+#define TWIE_MASTER_BAUD  _SFR_MEM8(0x04A5)
+#define TWIE_MASTER_ADDR  _SFR_MEM8(0x04A6)
+#define TWIE_MASTER_DATA  _SFR_MEM8(0x04A7)
+#define TWIE_SLAVE_CTRLA  _SFR_MEM8(0x04A8)
+#define TWIE_SLAVE_CTRLB  _SFR_MEM8(0x04A9)
+#define TWIE_SLAVE_STATUS  _SFR_MEM8(0x04AA)
+#define TWIE_SLAVE_ADDR  _SFR_MEM8(0x04AB)
+#define TWIE_SLAVE_DATA  _SFR_MEM8(0x04AC)
+#define TWIE_SLAVE_ADDRMASK  _SFR_MEM8(0x04AD)
+
 /* PORTA - Port A */
 #define PORTA_DIR  _SFR_MEM8(0x0600)
 #define PORTA_DIRSET  _SFR_MEM8(0x0601)
@@ -3949,6 +3976,13 @@
 
 
 /* ADC.CTRLB  bit masks and bit positions */
+#define ADC_CURRLIMIT_gm  0x60  /* Current Limitation group mask. */
+#define ADC_CURRLIMIT_gp  5  /* Current Limitation group position. */
+#define ADC_CURRLIMIT0_bm  (1<<5)  /* Current Limitation bit 0 mask. */
+#define ADC_CURRLIMIT0_bp  5  /* Current Limitation bit 0 position. */
+#define ADC_CURRLIMIT1_bm  (1<<6)  /* Current Limitation bit 1 mask. */
+#define ADC_CURRLIMIT1_bp  6  /* Current Limitation bit 1 position. */
+
 #define ADC_CONMODE_bm  0x10  /* Conversion Mode bit mask. */
 #define ADC_CONMODE_bp  4  /* Conversion Mode bit position. */
 
@@ -5416,6 +5450,12 @@
 #define PORTE_INT1_vect_num  44
 #define PORTE_INT1_vect      _VECTOR(44)  /* External Interrupt 1 */
 
+/* TWIE interrupt vectors */
+#define TWIE_TWIS_vect_num  45
+#define TWIE_TWIS_vect      _VECTOR(45)  /* TWI Slave Interrupt */
+#define TWIE_TWIM_vect_num  46
+#define TWIE_TWIM_vect      _VECTOR(46)  /* TWI Master Interrupt */
+
 /* TCE0 interrupt vectors */
 #define TCE0_OVF_vect_num  47
 #define TCE0_OVF_vect      _VECTOR(47)  /* Overflow Interrupt */
Index: avr-libc/include/avr/iox256a3b.h
===================================================================
--- avr-libc/include/avr/iox256a3b.h	(revision 2450)
+++ avr-libc/include/avr/iox256a3b.h	(working copy)
@@ -3448,15 +3448,6 @@
 #define USARTF0_BAUDCTRLA  _SFR_MEM8(0x0BA6)
 #define USARTF0_BAUDCTRLB  _SFR_MEM8(0x0BA7)
 
-/* USARTF1 - Universal Asynchronous Receiver-Transmitter F1 */
-#define USARTF1_DATA  _SFR_MEM8(0x0BB0)
-#define USARTF1_STATUS  _SFR_MEM8(0x0BB1)
-#define USARTF1_CTRLA  _SFR_MEM8(0x0BB3)
-#define USARTF1_CTRLB  _SFR_MEM8(0x0BB4)
-#define USARTF1_CTRLC  _SFR_MEM8(0x0BB5)
-#define USARTF1_BAUDCTRLA  _SFR_MEM8(0x0BB6)
-#define USARTF1_BAUDCTRLB  _SFR_MEM8(0x0BB7)
-
 /* SPIF - Serial Peripheral Interface F */
 #define SPIF_CTRL  _SFR_MEM8(0x0BC0)
 #define SPIF_INTCTRL  _SFR_MEM8(0x0BC1)
Index: avr-libc/include/avr/iox256d3.h
===================================================================
--- avr-libc/include/avr/iox256d3.h	(revision 2450)
+++ avr-libc/include/avr/iox256d3.h	(working copy)
@@ -1038,6 +1038,15 @@
     ADC_CH_t CH0;  /* ADC Channel 0 */
 } ADC_t;
 
+/* Current Limitation */
+typedef enum ADC_CURRLIMIT_enum
+{
+    ADC_CURRLIMIT_NO_gc = (0x00<<5),  /* No current limit,     300ksps max sampling rate */
+    ADC_CURRLIMIT_LOW_gc = (0x01<<5),  /* Low current limit,    225ksps max sampling rate */
+    ADC_CURRLIMIT_MED_gc = (0x02<<5),  /* Medium current limit, 150ksps max sampling rate */
+    ADC_CURRLIMIT_HIGH_gc = (0x03<<5),  /* High current limit,   75ksps max sampling rate */
+} ADC_CURRLIMIT_t;
+
 /* Positive input multiplexer selection */
 typedef enum ADC_CH_MUXPOS_enum
 {
@@ -1083,6 +1092,7 @@
     ADC_CH_GAIN_16X_gc = (0x04<<2),  /* 16x gain */
     ADC_CH_GAIN_32X_gc = (0x05<<2),  /* 32x gain */
     ADC_CH_GAIN_64X_gc = (0x06<<2),  /* 64x gain */
+    ADC_CH_GAIN_DIV2_gc = (0x07<<2),  /* x/2 gain */		
 } ADC_CH_GAIN_t;
 
 /* Conversion result resolution */
@@ -2204,6 +2214,7 @@
 #define ACA    (*(AC_t *) 0x0380)  /* Analog Comparator A */
 #define RTC    (*(RTC_t *) 0x0400)  /* Real-Time Counter */
 #define TWIC    (*(TWI_t *) 0x0480)  /* Two-Wire Interface C */
+#define TWIE    (*(TWI_t *) 0x04A0)  /* Two-Wire Interface E */
 #define PORTA    (*(PORT_t *) 0x0600)  /* Port A */
 #define PORTB    (*(PORT_t *) 0x0620)  /* Port B */
 #define PORTC    (*(PORT_t *) 0x0640)  /* Port C */
@@ -2450,6 +2461,22 @@
 #define TWIC_SLAVE_DATA  _SFR_MEM8(0x048C)
 #define TWIC_SLAVE_ADDRMASK  _SFR_MEM8(0x048D)
 
+/* TWIE - Two-Wire Interface E */
+#define TWIE_CTRL  _SFR_MEM8(0x04A0)
+#define TWIE_MASTER_CTRLA  _SFR_MEM8(0x04A1)
+#define TWIE_MASTER_CTRLB  _SFR_MEM8(0x04A2)
+#define TWIE_MASTER_CTRLC  _SFR_MEM8(0x04A3)
+#define TWIE_MASTER_STATUS  _SFR_MEM8(0x04A4)
+#define TWIE_MASTER_BAUD  _SFR_MEM8(0x04A5)
+#define TWIE_MASTER_ADDR  _SFR_MEM8(0x04A6)
+#define TWIE_MASTER_DATA  _SFR_MEM8(0x04A7)
+#define TWIE_SLAVE_CTRLA  _SFR_MEM8(0x04A8)
+#define TWIE_SLAVE_CTRLB  _SFR_MEM8(0x04A9)
+#define TWIE_SLAVE_STATUS  _SFR_MEM8(0x04AA)
+#define TWIE_SLAVE_ADDR  _SFR_MEM8(0x04AB)
+#define TWIE_SLAVE_DATA  _SFR_MEM8(0x04AC)
+#define TWIE_SLAVE_ADDRMASK  _SFR_MEM8(0x04AD)
+
 /* PORTA - Port A */
 #define PORTA_DIR  _SFR_MEM8(0x0600)
 #define PORTA_DIRSET  _SFR_MEM8(0x0601)
@@ -2960,31 +2987,31 @@
 #define PR_TC0_bp  0  /* Port C Timer/Counter0 bit position. */
 
 /* PR.PRPD  bit masks and bit positions */
-/* PR_USART0_bm  Predefined. */
-/* PR_USART0_bp  Predefined. */
+/* PR_USART0  Predefined. */
+/* PR_USART0  Predefined. */
 
-/* PR_SPI_bm  Predefined. */
-/* PR_SPI_bp  Predefined. */
+/* PR_SPI  Predefined. */
+/* PR_SPI  Predefined. */
 
-/* PR_TC0_bm  Predefined. */
-/* PR_TC0_bp  Predefined. */
+/* PR_TC0  Predefined. */
+/* PR_TC0  Predefined. */
 
 /* PR.PRPE  bit masks and bit positions */
-/* PR_TWI_bm  Predefined. */
-/* PR_TWI_bp  Predefined. */
+/* PR_TWI  Predefined. */
+/* PR_TWI  Predefined. */
 
-/* PR_USART0_bm  Predefined. */
-/* PR_USART0_bp  Predefined. */
+/* PR_USART0  Predefined. */
+/* PR_USART0  Predefined. */
 
-/* PR_TC0_bm  Predefined. */
-/* PR_TC0_bp  Predefined. */
+/* PR_TC0  Predefined. */
+/* PR_TC0  Predefined. */
 
 /* PR.PRPF  bit masks and bit positions */
-/* PR_USART0_bm  Predefined. */
-/* PR_USART0_bp  Predefined. */
+/* PR_USART0  Predefined. */
+/* PR_USART0  Predefined. */
 
-/* PR_TC0_bm  Predefined. */
-/* PR_TC0_bp  Predefined. */
+/* PR_TC0  Predefined. */
+/* PR_TC0  Predefined. */
 
 /* SLEEP - Sleep Controller */
 /* SLEEP.CTRL  bit masks and bit positions */
@@ -3918,6 +3945,13 @@
 
 
 /* ADC.CTRLB  bit masks and bit positions */
+#define ADC_CURRLIMIT_gm  0x60  /* Current Limitation group mask. */
+#define ADC_CURRLIMIT_gp  5  /* Current Limitation group position. */
+#define ADC_CURRLIMIT0_bm  (1<<5)  /* Current Limitation bit 0 mask. */
+#define ADC_CURRLIMIT0_bp  5  /* Current Limitation bit 0 position. */
+#define ADC_CURRLIMIT1_bm  (1<<6)  /* Current Limitation bit 1 mask. */
+#define ADC_CURRLIMIT1_bp  6  /* Current Limitation bit 1 position. */
+
 #define ADC_CONMODE_bm  0x10  /* Conversion Mode bit mask. */
 #define ADC_CONMODE_bp  4  /* Conversion Mode bit position. */
 
@@ -5374,6 +5408,12 @@
 #define PORTE_INT1_vect_num  44
 #define PORTE_INT1_vect      _VECTOR(44)  /* External Interrupt 1 */
 
+/* TWIE interrupt vectors */
+#define TWIE_TWIS_vect_num  45
+#define TWIE_TWIS_vect      _VECTOR(45)  /* TWI Slave Interrupt */
+#define TWIE_TWIM_vect_num  46
+#define TWIE_TWIM_vect      _VECTOR(46)  /* TWI Master Interrupt */
+
 /* TCE0 interrupt vectors */
 #define TCE0_OVF_vect_num  47
 #define TCE0_OVF_vect      _VECTOR(47)  /* Overflow Interrupt */
Index: avr-libc/include/avr/iox32d4.h
===================================================================
--- avr-libc/include/avr/iox32d4.h	(revision 2450)
+++ avr-libc/include/avr/iox32d4.h	(working copy)
@@ -414,8 +414,45 @@
 } PMIC_t;
 
 
+
 /*
 --------------------------------------------------------------------------
+CRC - Cyclic Redundancy Checker
+--------------------------------------------------------------------------
+*/
+
+/* Cyclic Redundancy Checker */
+typedef struct CRC_struct
+{
+    register8_t CTRL;  /* Control Register */
+    register8_t STATUS;  /* Status Register */
+    register8_t reserved_0x02;
+    register8_t DATAIN;  /* Data Input */
+    register8_t CHECKSUM0;  /* Checksum byte 0 */
+    register8_t CHECKSUM1;  /* Checksum byte 1 */
+    register8_t CHECKSUM2;  /* Checksum byte 2 */
+    register8_t CHECKSUM3;  /* Checksum byte 3 */
+} CRC_t;
+
+/* Reset */
+typedef enum CRC_RESET_enum
+{
+    CRC_RESET_NO_gc = (0x00<<6),  /* No Reset */
+    CRC_RESET_RESET0_gc = (0x02<<6),  /* Reset CRC with CHECKSUM to all zeros */
+    CRC_RESET_RESET1_gc = (0x03<<6),  /* Reset CRC with CHECKSUM to all ones */
+} CRC_RESET_t;
+
+/* Input Source */
+typedef enum CRC_SOURCE_enum
+{
+    CRC_SOURCE_DISABLE_gc = (0x00<<0),  /* Disabled */
+    CRC_SOURCE_IO_gc = (0x01<<0),  /* I/O Interface */
+    CRC_SOURCE_FLASH_gc = (0x02<<0),  /* Flash */
+} CRC_SOURCE_t;
+
+
+/*
+--------------------------------------------------------------------------
 EVSYS - Event System
 --------------------------------------------------------------------------
 */
@@ -1059,6 +1096,7 @@
     ADC_CH_GAIN_16X_gc = (0x04<<2),  /* 16x gain */
     ADC_CH_GAIN_32X_gc = (0x05<<2),  /* 32x gain */
     ADC_CH_GAIN_64X_gc = (0x06<<2),  /* 64x gain */
+    ADC_CH_GAIN_DIV2_gc = (0x07<<2),  /* x/2 gain */		
 } ADC_CH_GAIN_t;
 
 /* Conversion result resolution */
@@ -1069,6 +1107,14 @@
     ADC_RESOLUTION_LEFT12BIT_gc = (0x03<<1),  /* 12-bit left-adjusted result */
 } ADC_RESOLUTION_t;
 
+typedef enum ADC_CURRLIMIT_enum
+{
+    ADC_CURRLIMIT_NO_gc = (0x00<<5),  /* No limit */
+    ADC_CURRLIMIT_LOW_gc = (0x01<<5),  /* Low current limit, max. sampling rate 1.5MSPS */
+    ADC_CURRLIMIT_MED_gc = (0x02<<5),  /* Medium current limit, max. sampling rate 1MSPS */
+    ADC_CURRLIMIT_HIGH_gc = (0x03<<5),  /* High current limit, max. sampling rate 0.5MSPS */
+} ADC_CURRLIMIT_t;
+
 /* Voltage reference selection */
 typedef enum ADC_REFSEL_enum
 {
@@ -2187,6 +2233,7 @@
 #define ACA    (*(AC_t *) 0x0380)  /* Analog Comparator A */
 #define RTC    (*(RTC_t *) 0x0400)  /* Real-Time Counter */
 #define TWIC    (*(TWI_t *) 0x0480)  /* Two-Wire Interface C */
+#define TWIE    (*(TWI_t *) 0x04A0)  /* Two-Wire Interface E */
 #define PORTA    (*(PORT_t *) 0x0600)  /* Port A */
 #define PORTB    (*(PORT_t *) 0x0620)  /* Port B */
 #define PORTC    (*(PORT_t *) 0x0640)  /* Port C */
@@ -2421,6 +2468,23 @@
 #define TWIC_SLAVE_DATA  _SFR_MEM8(0x048C)
 #define TWIC_SLAVE_ADDRMASK  _SFR_MEM8(0x048D)
 
+/* TWIE - Two-Wire Interface E */
+#define TWIE_CTRL  _SFR_MEM8(0x04A0)
+#define TWIE_MASTER_CTRLA  _SFR_MEM8(0x04A1)
+#define TWIE_MASTER_CTRLB  _SFR_MEM8(0x04A2)
+#define TWIE_MASTER_CTRLC  _SFR_MEM8(0x04A3)
+#define TWIE_MASTER_STATUS  _SFR_MEM8(0x04A4)
+#define TWIE_MASTER_BAUD  _SFR_MEM8(0x04A5)
+#define TWIE_MASTER_ADDR  _SFR_MEM8(0x04A6)
+#define TWIE_MASTER_DATA  _SFR_MEM8(0x04A7)
+#define TWIE_SLAVE_CTRLA  _SFR_MEM8(0x04A8)
+#define TWIE_SLAVE_CTRLB  _SFR_MEM8(0x04A9)
+#define TWIE_SLAVE_STATUS  _SFR_MEM8(0x04AA)
+#define TWIE_SLAVE_ADDR  _SFR_MEM8(0x04AB)
+#define TWIE_SLAVE_DATA  _SFR_MEM8(0x04AC)
+#define TWIE_SLAVE_ADDRMASK  _SFR_MEM8(0x04AD)
+
+
 /* PORTA - Port A */
 #define PORTA_DIR  _SFR_MEM8(0x0600)
 #define PORTA_DIRSET  _SFR_MEM8(0x0601)
@@ -3808,6 +3872,8 @@
 #define ADC_CH_MUXPOS2_bp  5  /* Positive Input Select bit 2 position. */
 #define ADC_CH_MUXPOS3_bm  (1<<6)  /* Positive Input Select bit 3 mask. */
 #define ADC_CH_MUXPOS3_bp  6  /* Positive Input Select bit 3 position. */
+#define ADC_CH_MUXPOS4_bm  (1<<7)  /* Positive Input Select bit 3 mask. */
+#define ADC_CH_MUXPOS4_bp  7  /* Positive Input Select bit 3 position. */
 
 #define ADC_CH_MUXINT_gm  0x78  /* Internal Input Select group mask. */
 #define ADC_CH_MUXINT_gp  3  /* Internal Input Select group position. */
@@ -3861,6 +3927,13 @@
 
 
 /* ADC.CTRLB  bit masks and bit positions */
+#define ADC_IMPMODE_bm  0x80  /* Impedance Mode bit mask. */
+#define ADC_IMPMODE_bp  7  /* Impedance Mode bit position. */
+
+#define ADC_CURRENT_bm  0x60  /* Current bit mask. */
+#define ADC_CURRENT1_bp  6  /* Current bit position. */
+#define ADC_CURRENT0_bp  5  /* Current bit position. */
+
 #define ADC_CONMODE_bm  0x10  /* Conversion Mode bit mask. */
 #define ADC_CONMODE_bp  4  /* Conversion Mode bit position. */
 
@@ -3876,12 +3949,14 @@
 
 
 /* ADC.REFCTRL  bit masks and bit positions */
-#define ADC_REFSEL_gm  0x30  /* Reference Selection group mask. */
+#define ADC_REFSEL_gm  0x70  /* Reference Selection group mask. */
 #define ADC_REFSEL_gp  4  /* Reference Selection group position. */
 #define ADC_REFSEL0_bm  (1<<4)  /* Reference Selection bit 0 mask. */
 #define ADC_REFSEL0_bp  4  /* Reference Selection bit 0 position. */
 #define ADC_REFSEL1_bm  (1<<5)  /* Reference Selection bit 1 mask. */
 #define ADC_REFSEL1_bp  5  /* Reference Selection bit 1 position. */
+#define ADC_REFSEL2_bm  (1<<6)  /* Reference Selection bit 2 mask. */
+#define ADC_REFSEL2_bp  6  /* Reference Selection bit 2 position. */
 
 #define ADC_BANDGAP_bm  0x02  /* Bandgap enable bit mask. */
 #define ADC_BANDGAP_bp  1  /* Bandgap enable bit position. */
@@ -5334,6 +5409,12 @@
 #define PORTE_INT1_vect_num  44
 #define PORTE_INT1_vect      _VECTOR(44)  /* External Interrupt 1 */
 
+/* TWIE interrupt vectors */
+#define TWIE_TWIS_vect_num  45
+#define TWIE_TWIS_vect      _VECTOR(45)  /* TWI Slave Interrupt */
+#define TWIE_TWIM_vect_num  46
+#define TWIE_TWIM_vect      _VECTOR(46)  /* TWI Master Interrupt */
+
 /* TCE0 interrupt vectors */
 #define TCE0_OVF_vect_num  47
 #define TCE0_OVF_vect      _VECTOR(47)  /* Overflow Interrupt */
Index: avr-libc/include/avr/iox64d3.h
===================================================================
--- avr-libc/include/avr/iox64d3.h	(revision 2450)
+++ avr-libc/include/avr/iox64d3.h	(working copy)
@@ -1045,6 +1045,15 @@
     ADC_CH_t CH0;  /* ADC Channel 0 */
 } ADC_t;
 
+/* Current Limitation */
+typedef enum ADC_CURRLIMIT_enum
+{
+    ADC_CURRLIMIT_NO_gc = (0x00<<5),  /* No current limit,     300ksps max sampling rate */
+    ADC_CURRLIMIT_LOW_gc = (0x01<<5),  /* Low current limit,    225ksps max sampling rate */
+    ADC_CURRLIMIT_MED_gc = (0x02<<5),  /* Medium current limit, 150ksps max sampling rate */
+    ADC_CURRLIMIT_HIGH_gc = (0x03<<5),  /* High current limit,   75ksps max sampling rate */
+} ADC_CURRLIMIT_t;
+
 /* Positive input multiplexer selection */
 typedef enum ADC_CH_MUXPOS_enum
 {
@@ -1099,6 +1108,7 @@
     ADC_CH_GAIN_16X_gc = (0x04<<2),  /* 16x gain */
     ADC_CH_GAIN_32X_gc = (0x05<<2),  /* 32x gain */
     ADC_CH_GAIN_64X_gc = (0x06<<2),  /* 64x gain */
+    ADC_CH_GAIN_DIV2_gc = (0x07<<2),  /* x/2 gain */	
 } ADC_CH_GAIN_t;
 
 /* Conversion result resolution */
@@ -2229,6 +2239,7 @@
 #define ACB    (*(AC_t *) 0x0390)  /* Analog Comparator B */
 #define RTC    (*(RTC_t *) 0x0400)  /* Real-Time Counter */
 #define TWIC    (*(TWI_t *) 0x0480)  /* Two-Wire Interface C */
+#define TWIE    (*(TWI_t *) 0x04A0)  /* Two-Wire Interface */
 #define PORTA    (*(PORT_t *) 0x0600)  /* Port A */
 #define PORTB    (*(PORT_t *) 0x0620)  /* Port B */
 #define PORTC    (*(PORT_t *) 0x0640)  /* Port C */
@@ -2486,6 +2497,22 @@
 #define TWIC_SLAVE_DATA  _SFR_MEM8(0x048C)
 #define TWIC_SLAVE_ADDRMASK  _SFR_MEM8(0x048D)
 
+/* TWIE - Two-Wire Interface E */
+#define TWIE_CTRL  _SFR_MEM8(0x04A0)
+#define TWIE_MASTER_CTRLA  _SFR_MEM8(0x04A1)
+#define TWIE_MASTER_CTRLB  _SFR_MEM8(0x04A2)
+#define TWIE_MASTER_CTRLC  _SFR_MEM8(0x04A3)
+#define TWIE_MASTER_STATUS  _SFR_MEM8(0x04A4)
+#define TWIE_MASTER_BAUD  _SFR_MEM8(0x04A5)
+#define TWIE_MASTER_ADDR  _SFR_MEM8(0x04A6)
+#define TWIE_MASTER_DATA  _SFR_MEM8(0x04A7)
+#define TWIE_SLAVE_CTRLA  _SFR_MEM8(0x04A8)
+#define TWIE_SLAVE_CTRLB  _SFR_MEM8(0x04A9)
+#define TWIE_SLAVE_STATUS  _SFR_MEM8(0x04AA)
+#define TWIE_SLAVE_ADDR  _SFR_MEM8(0x04AB)
+#define TWIE_SLAVE_DATA  _SFR_MEM8(0x04AC)
+#define TWIE_SLAVE_ADDRMASK  _SFR_MEM8(0x04AD)
+
 /* PORTA - Port A */
 #define PORTA_DIR  _SFR_MEM8(0x0600)
 #define PORTA_DIRSET  _SFR_MEM8(0x0601)
@@ -3963,6 +3990,13 @@
 
 
 /* ADC.CTRLB  bit masks and bit positions */
+#define ADC_CURRLIMIT_gm  0x60  /* Current Limitation group mask. */
+#define ADC_CURRLIMIT_gp  5  /* Current Limitation group position. */
+#define ADC_CURRLIMIT0_bm  (1<<5)  /* Current Limitation bit 0 mask. */
+#define ADC_CURRLIMIT0_bp  5  /* Current Limitation bit 0 position. */
+#define ADC_CURRLIMIT1_bm  (1<<6)  /* Current Limitation bit 1 mask. */
+#define ADC_CURRLIMIT1_bp  6  /* Current Limitation bit 1 position. */
+
 #define ADC_CONMODE_bm  0x10  /* Conversion Mode bit mask. */
 #define ADC_CONMODE_bp  4  /* Conversion Mode bit position. */
 
@@ -5430,6 +5464,12 @@
 #define PORTE_INT1_vect_num  44
 #define PORTE_INT1_vect      _VECTOR(44)  /* External Interrupt 1 */
 
+/* TWIE interrupt vectors */
+#define TWIE_TWIS_vect_num  45
+#define TWIE_TWIS_vect      _VECTOR(45)  /* TWI Slave Interrupt */
+#define TWIE_TWIM_vect_num  46
+#define TWIE_TWIM_vect      _VECTOR(46)  /* TWI Master Interrupt */
+
 /* TCE0 interrupt vectors */
 #define TCE0_OVF_vect_num  47
 #define TCE0_OVF_vect      _VECTOR(47)  /* Overflow Interrupt */
Index: avr-libc/include/avr/iox64d4.h
===================================================================
--- avr-libc/include/avr/iox64d4.h	(revision 2450)
+++ avr-libc/include/avr/iox64d4.h	(working copy)
@@ -939,10 +939,6 @@
     ADC_CH_MUXPOS_PIN9_gc = (0x09<<3),  /* Input pin 9 */
     ADC_CH_MUXPOS_PIN10_gc = (0x0A<<3),  /* Input pin 10 */
     ADC_CH_MUXPOS_PIN11_gc = (0x0B<<3),  /* Input pin 11 */
-    ADC_CH_MUXPOS_PIN12_gc = (0x0C<<3),  /* Input pin 12 */
-    ADC_CH_MUXPOS_PIN13_gc = (0x0D<<3),  /* Input pin 13 */
-    ADC_CH_MUXPOS_PIN14_gc = (0x0E<<3),  /* Input pin 14 */
-    ADC_CH_MUXPOS_PIN15_gc = (0x0F<<3),  /* Input pin 15 */
 } ADC_CH_MUXPOS_t;
 
 /* Internal input multiplexer selections */
