Index: include/avr/iom645.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom645.h,v
retrieving revision 1.17
diff -u -r1.17 iom645.h
--- include/avr/iom645.h	11 Feb 2009 17:53:37 -0000	1.17
+++ include/avr/iom645.h	26 Mar 2009 20:10:33 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004,2005,2006 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -671,86 +672,107 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
@@ -813,4 +835,241 @@
 #define SIGNATURE_2 0x05
 
 
+/* Device Pin Definitions */
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+
 #endif /* _AVR_IOM645_H_ */
Index: include/avr/iom32hvb.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom32hvb.h,v
retrieving revision 1.8
diff -u -r1.8 iom32hvb.h
--- include/avr/iom32hvb.h	11 Feb 2009 17:53:36 -0000	1.8
+++ include/avr/iom32hvb.h	26 Mar 2009 20:10:32 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -812,33 +813,61 @@
 /* Interrupt Vectors */
 /* Interrupt Vector 0 is the reset vector. */
 
+#define BPINT_num          1
 #define BPINT_vect         _VECTOR(1)  /* Battery Protection Interrupt */
+#define VREGMON_num        2
 #define VREGMON_vect       _VECTOR(2)  /* Voltage regulator monitor interrupt */
+#define INT0_num           3
 #define INT0_vect          _VECTOR(3)  /* External Interrupt Request 0 */
+#define INT1_num           4
 #define INT1_vect          _VECTOR(4)  /* External Interrupt Request 1 */
+#define INT2_num           5
 #define INT2_vect          _VECTOR(5)  /* External Interrupt Request 2 */
+#define INT3_num           6
 #define INT3_vect          _VECTOR(6)  /* External Interrupt Request 3 */
+#define PCINT0_num         7
 #define PCINT0_vect        _VECTOR(7)  /* Pin Change Interrupt 0 */
+#define PCINT1_num         8
 #define PCINT1_vect        _VECTOR(8)  /* Pin Change Interrupt 1 */
+#define WDT_num            9
 #define WDT_vect           _VECTOR(9)  /* Watchdog Timeout Interrupt */
+#define BGSCD_num          10
 #define BGSCD_vect         _VECTOR(10)  /* Bandgap Buffer Short Circuit Detected */
+#define CHDET_num          11
 #define CHDET_vect         _VECTOR(11)  /* Charger Detect */
+#define TIMER1_IC_num      12
 #define TIMER1_IC_vect     _VECTOR(12)  /* Timer 1 Input capture */
+#define TIMER1_COMPA_num   13
 #define TIMER1_COMPA_vect  _VECTOR(13)  /* Timer 1 Compare Match A */
+#define TIMER1_COMPB_num   14
 #define TIMER1_COMPB_vect  _VECTOR(14)  /* Timer 1 Compare Match B */
+#define TIMER1_OVF_num     15
 #define TIMER1_OVF_vect    _VECTOR(15)  /* Timer 1 overflow */
+#define TIMER0_IC_num      16
 #define TIMER0_IC_vect     _VECTOR(16)  /* Timer 0 Input Capture */
+#define TIMER0_COMPA_num   17
 #define TIMER0_COMPA_vect  _VECTOR(17)  /* Timer 0 Comapre Match A */
+#define TIMER0_COMPB_num   18
 #define TIMER0_COMPB_vect  _VECTOR(18)  /* Timer 0 Compare Match B */
+#define TIMER0_OVF_num     19
 #define TIMER0_OVF_vect    _VECTOR(19)  /* Timer 0 Overflow */
+#define TWIBUSCD_num       20
 #define TWIBUSCD_vect      _VECTOR(20)  /* Two-Wire Bus Connect/Disconnect */
+#define TWI_num            21
 #define TWI_vect           _VECTOR(21)  /* Two-Wire Serial Interface */
+#define SPI_STC_num        22
 #define SPI_STC_vect       _VECTOR(22)  /* SPI Serial transfer complete */
+#define VADC_num           23
 #define VADC_vect          _VECTOR(23)  /* Voltage ADC Conversion Complete */
+#define CCADC_CONV_num     24
 #define CCADC_CONV_vect    _VECTOR(24)  /* Coulomb Counter ADC Conversion Complete */
+#define CCADC_REG_CUR_num  25
 #define CCADC_REG_CUR_vect _VECTOR(25)  /* Coloumb Counter ADC Regular Current */
+#define CCADC_ACC_num      26
 #define CCADC_ACC_vect     _VECTOR(26)  /* Coloumb Counter ADC Accumulator */
+#define EE_READY_num       27
 #define EE_READY_vect      _VECTOR(27)  /* EEPROM Ready */
+#define SPM_num            28
 #define SPM_vect           _VECTOR(28)  /* SPM Ready */
 
 #define _VECTORS_SIZE (29 * 4)
@@ -882,4 +911,6 @@
 #define __LOCK_BITS_EXIST
 
 
+/* Device Pin Definitions */
+
 #endif  /* _AVR_IOM32HVB_H_ */
Index: include/avr/iom406.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom406.h,v
retrieving revision 1.9
diff -u -r1.9 iom406.h
--- include/avr/iom406.h	11 Feb 2009 17:53:37 -0000	1.9
+++ include/avr/iom406.h	26 Mar 2009 20:10:32 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2006, Pieter Conradie
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -636,89 +637,111 @@
 
 /* Interrupt vectors */
 /* Battery Protection Interrupt */
+#define BPINT_num 			1
 #define BPINT_vect			_VECTOR(1)
 
 
 /* External Interrupt Request 0 */
+#define INT0_num 			2
 #define INT0_vect			_VECTOR(2)
 
 
 /* External Interrupt Request 1 */
+#define INT1_num 			3
 #define INT1_vect			_VECTOR(3)
 
 
 /* External Interrupt Request 2 */
+#define INT2_num 			4
 #define INT2_vect			_VECTOR(4)
 
 
 /* External Interrupt Request 3 */
+#define INT3_num 			5
 #define INT3_vect			_VECTOR(5)
 
 
 /* Pin Change Interrupt 0 */
+#define PCINT0_num 			6
 #define PCINT0_vect			_VECTOR(6)
 
 
 /* Pin Change Interrupt 1 */
+#define PCINT1_num 			7
 #define PCINT1_vect			_VECTOR(7)
 
 
 /* Watchdog Timeout Interrupt */
+#define WDT_num 			8
 #define WDT_vect			_VECTOR(8)
 
 
 /* Wakeup timer overflow */
+#define WAKE_UP_num 			9
 #define WAKE_UP_vect			_VECTOR(9)
 
 
 /* Timer/Counter 1 Compare Match */
+#define TIM1_COMP_num 			10
 #define TIM1_COMP_vect			_VECTOR(10)
 
 
 /* Timer/Counter 1 Overflow */
+#define TIM1_OVF_num 			11
 #define TIM1_OVF_vect			_VECTOR(11)
 
 
 /* Timer/Counter0 Compare A Match */
+#define TIM0_COMPA_num 			12
 #define TIM0_COMPA_vect			_VECTOR(12)
 
 
 /* Timer/Counter0 Compare B Match */
+#define TIM0_COMPB_num 			13
 #define TIM0_COMPB_vect			_VECTOR(13)
 
 
 /* Timer/Counter0 Overflow */
+#define TIM0_OVF_num 			14
 #define TIM0_OVF_vect			_VECTOR(14)
 
 
 /* Two-Wire Bus Connect/Disconnect */
+#define TWI_BUS_CD_num 			15
 #define TWI_BUS_CD_vect			_VECTOR(15)
 
 
 /* Two-Wire Serial Interface */
+#define TWI_num 			16
 #define TWI_vect			_VECTOR(16)
 
 
 /* Voltage ADC Conversion Complete */
+#define VADC_num 			17
 #define VADC_vect			_VECTOR(17)
 
 
 /* Coulomb Counter ADC Conversion Complete */
+#define CCADC_CONV_num 			18
 #define CCADC_CONV_vect			_VECTOR(18)
 
 /* Coloumb Counter ADC Regular Current */
+#define CCADC_REG_CUR_num 		19
 #define CCADC_REG_CUR_vect		_VECTOR(19)
 
 
 /* Coloumb Counter ADC Accumulator */
+#define CCADC_ACC_num 			20
 #define CCADC_ACC_vect			_VECTOR(20)
 
 
 /* EEPROM Ready */
+#define EE_READY_num 			21
 #define EE_READY_vect			_VECTOR(21)
 
 
 /* Store Program Memory Ready */
+#define SPM_READY_num 			22
 #define SPM_READY_vect			_VECTOR(22)
 
 #define _VECTORS_SIZE 92
@@ -765,4 +788,146 @@
 #define SIGNATURE_2 0x07
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_INT0  	DDRA
+#define PORT_INT0 	PORTA
+#define PIN_INT0  	PINA
+#define INT0_IDX  	4
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_INT1  	DDRA
+#define PORT_INT1 	PORTA
+#define PIN_INT1  	PINA
+#define INT1_IDX  	5
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_INT2  	DDRA
+#define PORT_INT2 	PORTA
+#define PIN_INT2  	PINA
+#define INT2_IDX  	6
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_INT3  	DDRA
+#define PORT_INT3 	PORTA
+#define PIN_INT3  	PINA
+#define INT3_IDX  	7
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC0B  	DDRB
+#define PORT_OC0B 	PORTB
+#define PIN_OC0B  	PINB
+#define OC0B_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	0
+
+
 #endif /* _AVR_IOM406_H_ */
Index: include/avr/iom328p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom328p.h,v
retrieving revision 1.17
diff -u -r1.17 iom328p.h
--- include/avr/iom328p.h	11 Feb 2009 17:53:36 -0000	1.17
+++ include/avr/iom328p.h	26 Mar 2009 20:10:29 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -786,30 +787,55 @@
 
 /* Interrupt Vectors */
 /* Interrupt Vector 0 is the reset vector. */
+#define INT0_num          1
 #define INT0_vect         _VECTOR(1)   /* External Interrupt Request 0 */
+#define INT1_num          2
 #define INT1_vect         _VECTOR(2)   /* External Interrupt Request 1 */
+#define PCINT0_num        3
 #define PCINT0_vect       _VECTOR(3)   /* Pin Change Interrupt Request 0 */
+#define PCINT1_num        4
 #define PCINT1_vect       _VECTOR(4)   /* Pin Change Interrupt Request 0 */
+#define PCINT2_num        5
 #define PCINT2_vect       _VECTOR(5)   /* Pin Change Interrupt Request 1 */
+#define WDT_num           6
 #define WDT_vect          _VECTOR(6)   /* Watchdog Time-out Interrupt */
+#define TIMER2_COMPA_num  7
 #define TIMER2_COMPA_vect _VECTOR(7)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPB_num  8
 #define TIMER2_COMPB_vect _VECTOR(8)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_OVF_num    9
 #define TIMER2_OVF_vect   _VECTOR(9)   /* Timer/Counter2 Overflow */
+#define TIMER1_CAPT_num   10
 #define TIMER1_CAPT_vect  _VECTOR(10)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num  11
 #define TIMER1_COMPA_vect _VECTOR(11)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num  12
 #define TIMER1_COMPB_vect _VECTOR(12)  /* Timer/Counter1 Compare Match B */ 
+#define TIMER1_OVF_num    13
 #define TIMER1_OVF_vect   _VECTOR(13)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num  14
 #define TIMER0_COMPA_vect _VECTOR(14)  /* TimerCounter0 Compare Match A */
+#define TIMER0_COMPB_num  15
 #define TIMER0_COMPB_vect _VECTOR(15)  /* TimerCounter0 Compare Match B */
+#define TIMER0_OVF_num    16
 #define TIMER0_OVF_vect   _VECTOR(16)  /* Timer/Couner0 Overflow */
+#define SPI_STC_num       17
 #define SPI_STC_vect      _VECTOR(17)  /* SPI Serial Transfer Complete */
+#define USART_RX_num      18
 #define USART_RX_vect     _VECTOR(18)  /* USART Rx Complete */
+#define USART_UDRE_num    19
 #define USART_UDRE_vect   _VECTOR(19)  /* USART, Data Register Empty */
+#define USART_TX_num      20
 #define USART_TX_vect     _VECTOR(20)  /* USART Tx Complete */
+#define ADC_num           21
 #define ADC_vect          _VECTOR(21)  /* ADC Conversion Complete */
+#define EE_READY_num      22
 #define EE_READY_vect     _VECTOR(22)  /* EEPROM Ready */
+#define ANALOG_COMP_num   23
 #define ANALOG_COMP_vect  _VECTOR(23)  /* Analog Comparator */
+#define TWI_num           24
 #define TWI_vect          _VECTOR(24)  /* Two-wire Serial Interface */
+#define SPM_READY_num     25
 #define SPM_READY_vect    _VECTOR(25)  /* Store Program Memory Read */
 
 #define _VECTORS_SIZE (26 * 4)
@@ -872,4 +898,276 @@
 #define SIGNATURE_2 0x0F
 
 
+/* Device Pin Definitions */
+#define DDR_ICP1  	DDRB
+#define PORT_ICP1 	PORTB
+#define PIN_ICP1  	PINB
+#define ICP1_IDX  	0
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT16  	DDRD
+#define PORT_PCINT16 	PORTD
+#define PIN_PCINT16  	PIND
+#define PCINT16_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT17  	DDRD
+#define PORT_PCINT17 	PORTD
+#define PIN_PCINT17  	PIND
+#define PCINT17_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT18  	DDRD
+#define PORT_PCINT18 	PORTD
+#define PIN_PCINT18  	PIND
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRD
+#define PORT_PCINT19 	PORTD
+#define PIN_PCINT19  	PIND
+#define PCINT19_IDX  	3
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	3
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_PCINT20  	DDRD
+#define PORT_PCINT20 	PORTD
+#define PIN_PCINT20  	PIND
+#define PCINT20_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_PCINT21  	DDRD
+#define PORT_PCINT21 	PORTD
+#define PIN_PCINT21  	PIND
+#define PCINT21_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	6
+
+#define DDR_PCINT22  	DDRD
+#define PORT_PCINT22 	PORTD
+#define PIN_PCINT22  	PIND
+#define PCINT22_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+#define DDR_PCINT23  	DDRD
+#define PORT_PCINT23 	PORTD
+#define PIN_PCINT23  	PIND
+#define PCINT23_IDX  	7
+
+
 #endif  /* _AVR_IOM328P_H_ */
Index: include/avr/iom163.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom163.h,v
retrieving revision 1.20
diff -u -r1.20 iom163.h
--- include/avr/iom163.h	11 Feb 2009 17:53:35 -0000	1.20
+++ include/avr/iom163.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -166,70 +167,87 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		3
 #define TIMER2_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(3)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			4
 #define TIMER2_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW2			_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		6
 #define TIMER1_COMPA_vect		_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		7
 #define TIMER1_COMPB_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			8
 #define TIMER1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			9
 #define TIMER0_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW0			_VECTOR(9)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			10
 #define SPI_STC_vect			_VECTOR(10)
 #define SIG_SPI				_VECTOR(10)
 
 /* UART, RX Complete */
+#define UART_RX_num 			11
 #define UART_RX_vect			_VECTOR(11)
 #define SIG_UART_RECV			_VECTOR(11)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			12
 #define UART_UDRE_vect			_VECTOR(12)
 #define SIG_UART_DATA			_VECTOR(12)
 
 /* UART, TX Complete */
+#define UART_TX_num 			13
 #define UART_TX_vect			_VECTOR(13)
 #define SIG_UART_TRANS			_VECTOR(13)
 
 /* ADC Conversion Complete */
+#define ADC_num 			14
 #define ADC_vect			_VECTOR(14)
 #define SIG_ADC				_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			16
 #define ANA_COMP_vect			_VECTOR(16)
 #define SIG_COMPARATOR			_VECTOR(16)
 
 /* 2-Wire Serial Interface */
+#define TWI_num 			17
 #define TWI_vect			_VECTOR(17)
 #define SIG_2WIRE_SERIAL		_VECTOR(17)
 
@@ -636,4 +654,131 @@
 #define SIGNATURE_2 0x02
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IOM163_H_ */
Index: include/avr/io8515.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io8515.h,v
retrieving revision 1.10
diff -u -r1.10 io8515.h
--- include/avr/io8515.h	13 Aug 2008 23:29:49 -0000	1.10
+++ include/avr/io8515.h	26 Mar 2009 20:10:21 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -177,50 +178,62 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter Capture Event */
+#define TIMER1_CAPT_num 		3
 #define TIMER1_CAPT_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		4
 #define TIMER1_COMPA_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 
 /* Timer/Counter1 Compare MatchB */
+#define TIMER1_COMPB_num 		5
 #define TIMER1_COMPB_vect		_VECTOR(5)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(5)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			6
 #define TIMER1_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW1			_VECTOR(6)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			7
 #define TIMER0_OVF_vect			_VECTOR(7)
 #define SIG_OVERFLOW0			_VECTOR(7)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			8
 #define SPI_STC_vect			_VECTOR(8)
 #define SIG_SPI				_VECTOR(8)
 
 /* UART, Rx Complete */
+#define UART_RX_num 			9
 #define UART_RX_vect			_VECTOR(9)
 #define SIG_UART_RECV			_VECTOR(9)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			10
 #define UART_UDRE_vect			_VECTOR(10)
 #define SIG_UART_DATA			_VECTOR(10)
 
 /* UART, Tx Complete */
+#define UART_TX_num 			11
 #define UART_TX_vect			_VECTOR(11)
 #define SIG_UART_TRANS			_VECTOR(11)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			12
 #define ANA_COMP_vect			_VECTOR(12)
 #define SIG_COMPARATOR			_VECTOR(12)
 
@@ -483,4 +496,161 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_WR  	DDRD
+#define PORT_WR 	PORTD
+#define PIN_WR  	PIND
+#define WR_IDX  	6
+
+#define DDR_RD  	DDRD
+#define PORT_RD 	PORTD
+#define PIN_RD  	PIND
+#define RD_IDX  	7
+
+
 #endif /* _AVR_IO8515_H_ */
Index: include/avr/io90pwm316.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io90pwm316.h,v
retrieving revision 1.15
diff -u -r1.15 io90pwm316.h
--- include/avr/io90pwm316.h	11 Feb 2009 17:53:35 -0000	1.15
+++ include/avr/io90pwm316.h	26 Mar 2009 20:10:23 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007, Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1076,87 +1077,115 @@
 /* Interrupt 0 is the reset vector. */
 
 /* PSC2 Capture Event */
+#define PSC2_CAPT_num      1
 #define PSC2_CAPT_vect     _VECTOR(1)
 
 /* PSC2 End Cycle */
+#define PSC2_EC_num        2
 #define PSC2_EC_vect       _VECTOR(2)
 
 /* PSC1 Capture Event */
+#define PSC1_CAPT_num      3
 #define PSC1_CAPT_vect     _VECTOR(3)
 
 /* PSC1 End Cycle */
+#define PSC1_EC_num        4
 #define PSC1_EC_vect       _VECTOR(4)
 
 /* PSC0 Capture Event */
+#define PSC0_CAPT_num      5
 #define PSC0_CAPT_vect     _VECTOR(5)
 
 /* PSC0 End Cycle */
+#define PSC0_EC_num        6
 #define PSC0_EC_vect       _VECTOR(6)
 
 /* Analog Comparator 0 */
+#define ANALOG_COMP_0_num  7
 #define ANALOG_COMP_0_vect _VECTOR(7)
 
 /* Analog Comparator 1 */
+#define ANALOG_COMP_1_num  8
 #define ANALOG_COMP_1_vect _VECTOR(8)
 
 /* Analog Comparator 2 */
+#define ANALOG_COMP_2_num  9
 #define ANALOG_COMP_2_vect _VECTOR(9)
 
 /* External Interrupt Request 0 */
+#define INT0_num           10
 #define INT0_vect          _VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num    11
 #define TIMER1_CAPT_vect   _VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num   12
 #define TIMER1_COMPA_vect  _VECTOR(12)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num   13
 #define TIMER1_COMPB_vect  _VECTOR(13)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num     15
 #define TIMER1_OVF_vect    _VECTOR(15)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMP_A_num  16
 #define TIMER0_COMP_A_vect _VECTOR(16)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num     17
 #define TIMER0_OVF_vect    _VECTOR(17)
 
 /* ADC Conversion Complete */
+#define ADC_num            18
 #define ADC_vect           _VECTOR(18)
 
 /* External Interrupt Request 1 */
+#define INT1_num           19
 #define INT1_vect          _VECTOR(19)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num        20
 #define SPI_STC_vect       _VECTOR(20)
 
 /* USART, Rx Complete */
+#define USART_RX_num       21
 #define USART_RX_vect      _VECTOR(21)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num     22
 #define USART_UDRE_vect    _VECTOR(22)
 
 /* USART, Tx Complete */
+#define USART_TX_num       23
 #define USART_TX_vect      _VECTOR(23)
 
 /* External Interrupt Request 2 */
+#define INT2_num           24
 #define INT2_vect          _VECTOR(24)
 
 /* Watchdog Timeout Interrupt */
+#define WDT_num            25
 #define WDT_vect           _VECTOR(25)
 
 /* EEPROM Ready */
+#define EE_READY_num       26
 #define EE_READY_vect      _VECTOR(26)
 
 /* Timer Counter 0 Compare Match B */
+#define TIMER0_COMPB_num   27
 #define TIMER0_COMPB_vect  _VECTOR(27)
 
 /* External Interrupt Request 3 */
+#define INT3_num           28
 #define INT3_vect          _VECTOR(28)
 
 /* Store Program Memory Read */
+#define SPM_READY_num      31
 #define SPM_READY_vect     _VECTOR(31)
 
 #define _VECTORS_SIZE   (4 * 32)
@@ -1221,4 +1250,296 @@
 #define SIGNATURE_2 0x83
 
 
+/* Device Pin Definitions */
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	0
+
+#define DDR_PSCOUT20  	DDRB
+#define PORT_PSCOUT20 	PORTB
+#define PIN_PSCOUT20  	PINB
+#define PSCOUT20_IDX  	0
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	1
+
+#define DDR_PSCOUT21  	DDRB
+#define PORT_PSCOUT21 	PORTB
+#define PIN_PSCOUT21  	PINB
+#define PSCOUT21_IDX  	1
+
+#define DDR_ADC5  	DDRB
+#define PORT_ADC5 	PORTB
+#define PIN_ADC5  	PINB
+#define ADC5_IDX  	2
+
+#define DDR_INT1  	DDRB
+#define PORT_INT1 	PORTB
+#define PIN_INT1  	PINB
+#define INT1_IDX  	2
+
+#define DDR_AMP0_N  	DDRB
+#define PORT_AMP0_N 	PORTB
+#define PIN_AMP0_N  	PINB
+#define AMP0_N_IDX  	3
+
+#define DDR_AMP0_P  	DDRB
+#define PORT_AMP0_P 	PORTB
+#define PIN_AMP0_P  	PINB
+#define AMP0_P_IDX  	4
+
+#define DDR_ADC6  	DDRB
+#define PORT_ADC6 	PORTB
+#define PIN_ADC6  	PINB
+#define ADC6_IDX  	5
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	5
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	6
+
+#define DDR_PSCOUT11  	DDRB
+#define PORT_PSCOUT11 	PORTB
+#define PIN_PSCOUT11  	PINB
+#define PSCOUT11_IDX  	6
+
+#define DDR_ICP1B  	DDRB
+#define PORT_ICP1B 	PORTB
+#define PIN_ICP1B  	PINB
+#define ICP1B_IDX  	6
+
+#define DDR_ADC4  	DDRB
+#define PORT_ADC4 	PORTB
+#define PIN_ADC4  	PINB
+#define ADC4_IDX  	7
+
+#define DDR_PSCOUT01  	DDRB
+#define PORT_PSCOUT01 	PORTB
+#define PIN_PSCOUT01  	PINB
+#define PSCOUT01_IDX  	7
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_INT3  	DDRC
+#define PORT_INT3 	PORTC
+#define PIN_INT3  	PINC
+#define INT3_IDX  	0
+
+#define DDR_PSCOUT10  	DDRC
+#define PORT_PSCOUT10 	PORTC
+#define PIN_PSCOUT10  	PINC
+#define PSCOUT10_IDX  	0
+
+#define DDR_PSCIN1  	DDRC
+#define PORT_PSCIN1 	PORTC
+#define PIN_PSCIN1  	PINC
+#define PSCIN1_IDX  	1
+
+#define DDR_OC1B  	DDRC
+#define PORT_OC1B 	PORTC
+#define PIN_OC1B  	PINC
+#define OC1B_IDX  	1
+
+#define DDR_T0  	DDRC
+#define PORT_T0 	PORTC
+#define PIN_T0  	PINC
+#define T0_IDX  	2
+
+#define DDR_PSCOUT22  	DDRC
+#define PORT_PSCOUT22 	PORTC
+#define PIN_PSCOUT22  	PINC
+#define PSCOUT22_IDX  	2
+
+#define DDR_T1  	DDRC
+#define PORT_T1 	PORTC
+#define PIN_T1  	PINC
+#define T1_IDX  	3
+
+#define DDR_PSCOUT23  	DDRC
+#define PORT_PSCOUT23 	PORTC
+#define PIN_PSCOUT23  	PINC
+#define PSCOUT23_IDX  	3
+
+#define DDR_ADC8  	DDRC
+#define PORT_ADC8 	PORTC
+#define PIN_ADC8  	PINC
+#define ADC8_IDX  	4
+
+#define DDR_AMP1_N  	DDRC
+#define PORT_AMP1_N 	PORTC
+#define PIN_AMP1_N  	PINC
+#define AMP1_N_IDX  	4
+
+#define DDR_ADC9  	DDRC
+#define PORT_ADC9 	PORTC
+#define PIN_ADC9  	PINC
+#define ADC9_IDX  	5
+
+#define DDR_AMP1_P  	DDRC
+#define PORT_AMP1_P 	PORTC
+#define PIN_AMP1_P  	PINC
+#define AMP1_P_IDX  	5
+
+#define DDR_ADC10  	DDRC
+#define PORT_ADC10 	PORTC
+#define PIN_ADC10  	PINC
+#define ADC10_IDX  	6
+
+#define DDR_ACMP1  	DDRC
+#define PORT_ACMP1 	PORTC
+#define PIN_ACMP1  	PINC
+#define ACMP1_IDX  	6
+
+#define DDR_D2A  	DDRC
+#define PORT_D2A 	PORTC
+#define PIN_D2A  	PINC
+#define D2A_IDX  	7
+
+#define DDR_PSCOUT00  	DDRD
+#define PORT_PSCOUT00 	PORTD
+#define PIN_PSCOUT00  	PIND
+#define PSCOUT00_IDX  	0
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	0
+
+#define DDR_SSA  	DDRD
+#define PORT_SSA 	PORTD
+#define PIN_SSA  	PIND
+#define SSA_IDX  	0
+
+#define DDR_PSCIN0  	DDRD
+#define PORT_PSCIN0 	PORTD
+#define PIN_PSCIN0  	PIND
+#define PSCIN0_IDX  	1
+
+#define DDR_CLKO  	DDRD
+#define PORT_CLKO 	PORTD
+#define PIN_CLKO  	PIND
+#define CLKO_IDX  	1
+
+#define DDR_PSCIN2  	DDRD
+#define PORT_PSCIN2 	PORTD
+#define PIN_PSCIN2  	PIND
+#define PSCIN2_IDX  	2
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	2
+
+#define DDR_MISO_A  	DDRD
+#define PORT_MISO_A 	PORTD
+#define PIN_MISO_A  	PIND
+#define MISO_A_IDX  	2
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	3
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	3
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	3
+
+#define DDR_SS  	DDRD
+#define PORT_SS 	PORTD
+#define PIN_SS  	PIND
+#define SS_IDX  	3
+
+#define DDR_MOSI_A  	DDRD
+#define PORT_MOSI_A 	PORTD
+#define PIN_MOSI_A  	PIND
+#define MOSI_A_IDX  	3
+
+#define DDR_ADC1  	DDRD
+#define PORT_ADC1 	PORTD
+#define PIN_ADC1  	PIND
+#define ADC1_IDX  	4
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	4
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	4
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	4
+
+#define DDR_SCK_A  	DDRD
+#define PORT_SCK_A 	PORTD
+#define PIN_SCK_A  	PIND
+#define SCK_A_IDX  	4
+
+#define DDR_ADC2  	DDRD
+#define PORT_ADC2 	PORTD
+#define PIN_ADC2  	PIND
+#define ADC2_IDX  	5
+
+#define DDR_ACOMP2  	DDRD
+#define PORT_ACOMP2 	PORTD
+#define PIN_ACOMP2  	PIND
+#define ACOMP2_IDX  	5
+
+#define DDR_ADC3  	DDRD
+#define PORT_ADC3 	PORTD
+#define PIN_ADC3  	PIND
+#define ADC3_IDX  	6
+
+#define DDR_ACMPM  	DDRD
+#define PORT_ACMPM 	PORTD
+#define PIN_ACMPM  	PIND
+#define ACMPM_IDX  	6
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	6
+
+#define DDR_ACMP0  	DDRD
+#define PORT_ACMP0 	PORTD
+#define PIN_ACMP0  	PIND
+#define ACMP0_IDX  	7
+
+#define DDR_OCD  	DDRE
+#define PORT_OCD 	PORTE
+#define PIN_OCD  	PINE
+#define OCD_IDX  	0
+
+#define DDR_OC0B  	DDRE
+#define PORT_OC0B 	PORTE
+#define PIN_OC0B  	PINE
+#define OC0B_IDX  	1
+
+#define DDR_ADC0  	DDRE
+#define PORT_ADC0 	PORTE
+#define PIN_ADC0  	PINE
+#define ADC0_IDX  	2
+
+
 #endif /* _AVR_IO90PWM316_H_ */
Index: include/avr/iom161.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom161.h,v
retrieving revision 1.15
diff -u -r1.15 iom161.h
--- include/avr/iom161.h	17 Oct 2008 23:22:42 -0000	1.15
+++ include/avr/iom161.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -228,82 +229,102 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* UART0, Rx Complete */
+#define UART0_RX_num 			13
 #define UART0_RX_vect			_VECTOR(13)
 #define SIG_UART0_RECV			_VECTOR(13)
 
 /* UART1, Rx Complete */
+#define UART1_RX_num 			14
 #define UART1_RX_vect			_VECTOR(14)
 #define SIG_UART1_RECV			_VECTOR(14)
 
 /* UART0 Data Register Empty */
+#define UART0_UDRE_num 			15
 #define UART0_UDRE_vect			_VECTOR(15)
 #define SIG_UART0_DATA			_VECTOR(15)
 
 /* UART1 Data Register Empty */
+#define UART1_UDRE_num 			16
 #define UART1_UDRE_vect			_VECTOR(16)
 #define SIG_UART1_DATA			_VECTOR(16)
 
 /* UART0, Tx Complete */
+#define UART0_TX_num 			17
 #define UART0_TX_vect			_VECTOR(17)
 #define SIG_UART0_TRANS			_VECTOR(17)
 
 /* UART1, Tx Complete */
+#define UART1_TX_num 			18
 #define UART1_TX_vect			_VECTOR(18)
 #define SIG_UART1_TRANS			_VECTOR(18)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			19
 #define EE_RDY_vect			_VECTOR(19)
 #define SIG_EEPROM_READY		_VECTOR(19)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			20
 #define ANA_COMP_vect			_VECTOR(20)
 #define SIG_COMPARATOR			_VECTOR(20)
 
@@ -670,4 +691,186 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_OC0/T0  	DDRB
+#define PORT_OC0/T0 	PORTB
+#define PIN_OC0/T0  	PINB
+#define OC0/T0_IDX  	0
+
+#define DDR_OC2/T1  	DDRB
+#define PORT_OC2/T1 	PORTB
+#define PIN_OC2/T1  	PINB
+#define OC2/T1_IDX  	1
+
+#define DDR_RXD1  	DDRB
+#define PORT_RXD1 	PORTB
+#define PIN_RXD1  	PINB
+#define RXD1_IDX  	2
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_TXD1  	DDRB
+#define PORT_TXD1 	PORTB
+#define PIN_TXD1  	PINB
+#define TXD1_IDX  	3
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_WR  	DDRD
+#define PORT_WR 	PORTD
+#define PIN_WR  	PIND
+#define WR_IDX  	6
+
+#define DDR_RD  	DDRD
+#define PORT_RD 	PORTD
+#define PIN_RD  	PIND
+#define RD_IDX  	7
+
+#define DDR_ICP/INT2  	DDRE
+#define PORT_ICP/INT2 	PORTE
+#define PIN_ICP/INT2  	PINE
+#define ICP/INT2_IDX  	0
+
+#define DDR_ALE  	DDRE
+#define PORT_ALE 	PORTE
+#define PIN_ALE  	PINE
+#define ALE_IDX  	1
+
+#define DDR_OC1B  	DDRE
+#define PORT_OC1B 	PORTE
+#define PIN_OC1B  	PINE
+#define OC1B_IDX  	2
+
+
 #endif /* _AVR_IOM161_H_ */
Index: include/avr/iotn15.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn15.h,v
retrieving revision 1.17
diff -u -r1.17 iotn15.h
--- include/avr/iotn15.h	17 Oct 2008 23:22:44 -0000	1.17
+++ include/avr/iotn15.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002,2005 Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -139,35 +140,43 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 0 */
+#define IO_PINS_num 			2
 #define IO_PINS_vect			_VECTOR(2)
 #define SIG_PIN				_VECTOR(2)
 #define SIG_PIN_CHANGE			_VECTOR(2)
 
 /* Timer/Counter1 Compare Match */
+#define TIMER1_COMP_num 		3
 #define TIMER1_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(3)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			4
 #define TIMER1_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW1			_VECTOR(4)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			5
 #define TIMER0_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW0			_VECTOR(5)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			6
 #define EE_RDY_vect			_VECTOR(6)
 #define SIG_EEPROM_READY		_VECTOR(6)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			7
 #define ANA_COMP_vect			_VECTOR(7)
 #define SIG_COMPARATOR			_VECTOR(7)
 
 /* ADC Conversion Ready */
+#define ADC_num 			8
 #define ADC_vect			_VECTOR(8)
 #define SIG_ADC				_VECTOR(8)
 
@@ -330,4 +339,66 @@
 #define SIGNATURE_2 0x06
 
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_OCP  	DDRB
+#define PORT_OCP 	PORTB
+#define PIN_OCP  	PINB
+#define OCP_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_ADC1  	DDRB
+#define PORT_ADC1 	PORTB
+#define PIN_ADC1  	PINB
+#define ADC1_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	2
+
+#define DDR_ADC2  	DDRB
+#define PORT_ADC2 	PORTB
+#define PIN_ADC2  	PINB
+#define ADC2_IDX  	3
+
+#define DDR_ADC3  	DDRB
+#define PORT_ADC3 	PORTB
+#define PIN_ADC3  	PINB
+#define ADC3_IDX  	4
+
+#define DDR_ADC0  	DDRB
+#define PORT_ADC0 	PORTB
+#define PIN_ADC0  	PINB
+#define ADC0_IDX  	5
+
+
 #endif /* _AVR_IOTN15_H_ */
Index: include/avr/iom168p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom168p.h,v
retrieving revision 1.15
diff -u -r1.15 iom168p.h
--- include/avr/iom168p.h	11 Feb 2009 17:53:36 -0000	1.15
+++ include/avr/iom168p.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -785,30 +786,55 @@
 
 /* Interrupt Vectors */
 /* Interrupt Vector 0 is the reset vector. */
+#define INT0_num          1
 #define INT0_vect         _VECTOR(1)   /* External Interrupt Request 0 */
+#define INT1_num          2
 #define INT1_vect         _VECTOR(2)   /* External Interrupt Request 1 */
+#define PCINT0_num        3
 #define PCINT0_vect       _VECTOR(3)   /* Pin Change Interrupt Request 0 */
+#define PCINT1_num        4
 #define PCINT1_vect       _VECTOR(4)   /* Pin Change Interrupt Request 0 */
+#define PCINT2_num        5
 #define PCINT2_vect       _VECTOR(5)   /* Pin Change Interrupt Request 1 */
+#define WDT_num           6
 #define WDT_vect          _VECTOR(6)   /* Watchdog Time-out Interrupt */
+#define TIMER2_COMPA_num  7
 #define TIMER2_COMPA_vect _VECTOR(7)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPB_num  8
 #define TIMER2_COMPB_vect _VECTOR(8)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_OVF_num    9
 #define TIMER2_OVF_vect   _VECTOR(9)   /* Timer/Counter2 Overflow */
+#define TIMER1_CAPT_num   10
 #define TIMER1_CAPT_vect  _VECTOR(10)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num  11
 #define TIMER1_COMPA_vect _VECTOR(11)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num  12
 #define TIMER1_COMPB_vect _VECTOR(12)  /* Timer/Counter1 Compare Match B */ 
+#define TIMER1_OVF_num    13
 #define TIMER1_OVF_vect   _VECTOR(13)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num  14
 #define TIMER0_COMPA_vect _VECTOR(14)  /* TimerCounter0 Compare Match A */
+#define TIMER0_COMPB_num  15
 #define TIMER0_COMPB_vect _VECTOR(15)  /* TimerCounter0 Compare Match B */
+#define TIMER0_OVF_num    16
 #define TIMER0_OVF_vect   _VECTOR(16)  /* Timer/Couner0 Overflow */
+#define SPI_STC_num       17
 #define SPI_STC_vect      _VECTOR(17)  /* SPI Serial Transfer Complete */
+#define USART_RX_num      18
 #define USART_RX_vect     _VECTOR(18)  /* USART Rx Complete */
+#define USART_UDRE_num    19
 #define USART_UDRE_vect   _VECTOR(19)  /* USART, Data Register Empty */
+#define USART_TX_num      20
 #define USART_TX_vect     _VECTOR(20)  /* USART Tx Complete */
+#define ADC_num           21
 #define ADC_vect          _VECTOR(21)  /* ADC Conversion Complete */
+#define EE_READY_num      22
 #define EE_READY_vect     _VECTOR(22)  /* EEPROM Ready */
+#define ANALOG_COMP_num   23
 #define ANALOG_COMP_vect  _VECTOR(23)  /* Analog Comparator */
+#define TWI_num           24
 #define TWI_vect          _VECTOR(24)  /* Two-wire Serial Interface */
+#define SPM_READY_num     25
 #define SPM_READY_vect    _VECTOR(25)  /* Store Program Memory Read */
 
 #define _VECTORS_SIZE (26 * 4)
@@ -871,4 +897,276 @@
 #define SIGNATURE_2 0x0B
 
 
+/* Device Pin Definitions */
+#define DDR_ICP1  	DDRB
+#define PORT_ICP1 	PORTB
+#define PIN_ICP1  	PINB
+#define ICP1_IDX  	0
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT16  	DDRD
+#define PORT_PCINT16 	PORTD
+#define PIN_PCINT16  	PIND
+#define PCINT16_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT17  	DDRD
+#define PORT_PCINT17 	PORTD
+#define PIN_PCINT17  	PIND
+#define PCINT17_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT18  	DDRD
+#define PORT_PCINT18 	PORTD
+#define PIN_PCINT18  	PIND
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRD
+#define PORT_PCINT19 	PORTD
+#define PIN_PCINT19  	PIND
+#define PCINT19_IDX  	3
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	3
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_PCINT20  	DDRD
+#define PORT_PCINT20 	PORTD
+#define PIN_PCINT20  	PIND
+#define PCINT20_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_PCINT21  	DDRD
+#define PORT_PCINT21 	PORTD
+#define PIN_PCINT21  	PIND
+#define PCINT21_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	6
+
+#define DDR_PCINT22  	DDRD
+#define PORT_PCINT22 	PORTD
+#define PIN_PCINT22  	PIND
+#define PCINT22_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+#define DDR_PCINT23  	DDRD
+#define PORT_PCINT23 	PORTD
+#define PIN_PCINT23  	PIND
+#define PCINT23_IDX  	7
+
+
 #endif  /* _AVR_IOM168P_H_ */
Index: include/avr/io2333.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io2333.h,v
retrieving revision 1.10
diff -u -r1.10 io2333.h
--- include/avr/io2333.h	11 Feb 2009 17:53:34 -0000	1.10
+++ include/avr/io2333.h	26 Mar 2009 20:10:20 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -176,54 +177,67 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter Capture Event */
+#define TIMER1_CAPT_num 		3
 #define TIMER1_CAPT_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match */
+#define TIMER1_COMP_num 		4
 #define TIMER1_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			5
 #define TIMER1_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW1			_VECTOR(5)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			6
 #define TIMER0_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW0			_VECTOR(6)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			7
 #define SPI_STC_vect			_VECTOR(7)
 #define SIG_SPI				_VECTOR(7)
 
 /* UART, Rx Complete */
+#define UART_RX_num 			8
 #define UART_RX_vect			_VECTOR(8)
 #define SIG_UART_RECV			_VECTOR(8)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			9
 #define UART_UDRE_vect			_VECTOR(9)
 #define SIG_UART_DATA			_VECTOR(9)
 
 /* UART, Tx Complete */
+#define UART_TX_num 			10
 #define UART_TX_vect			_VECTOR(10)
 #define SIG_UART_TRANS			_VECTOR(10)
 
 /* ADC Conversion Complete */
+#define ADC_num 			11
 #define ADC_vect			_VECTOR(11)
 #define SIG_ADC				_VECTOR(11)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			12
 #define EE_RDY_vect			_VECTOR(12)
 #define SIG_EEPROM_READY		_VECTOR(12)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			13
 #define ANA_COMP_vect			_VECTOR(13)
 #define SIG_COMPARATOR			_VECTOR(13)
 
@@ -441,4 +455,106 @@
 #define    E2END    0x7F
 #define    FLASHEND 0x7FF
 
+/* Device Pin Definitions */
+#define DDR_ICP  	DDRB
+#define PORT_ICP 	PORTB
+#define PIN_ICP  	PINB
+#define ICP_IDX  	0
+
+#define DDR_OC1  	DDRB
+#define PORT_OC1 	PORTB
+#define PIN_OC1  	PINB
+#define OC1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_MOS1  	DDRB
+#define PORT_MOS1 	PORTB
+#define PIN_MOS1  	PINB
+#define MOS1_IDX  	3
+
+#define DDR_MOS0  	DDRB
+#define PORT_MOS0 	PORTB
+#define PIN_MOS0  	PINB
+#define MOS0_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+
 #endif /* _AVR_IO2333_H_ */
Index: include/avr/iom6450.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom6450.h,v
retrieving revision 1.18
diff -u -r1.18 iom6450.h
--- include/avr/iom6450.h	11 Feb 2009 17:53:37 -0000	1.18
+++ include/avr/iom6450.h	26 Mar 2009 20:10:33 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004,2005,2006 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -753,97 +754,123 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A	_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B	_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				    _VECTOR(12)
 
 /* USART, Rx Complete */
+#define USART_RX_num 			13
 #define USART_RX_vect			_VECTOR(13)
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)  /* Alias */
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART Data register Empty */
+#define USART_UDRE_num 			14
 #define USART_UDRE_vect			_VECTOR(14)
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)  /* Alias */
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
+#define USART_TX_num 			15
 #define USART_TX_vect			_VECTOR(15)  /* Alias */
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* Pin Change Interrupt Request 2 */
+#define PCINT2_num 			23
 #define PCINT2_vect			_VECTOR(23)
 #define SIG_PIN_CHANGE2			_VECTOR(23)
 
 /* Pin Change Interrupt Request 3 */
+#define PCINT3_num 			24
 #define PCINT3_vect			_VECTOR(24)
 #define SIG_PIN_CHANGE3			_VECTOR(24)
 
@@ -904,4 +931,316 @@
 #define SIGNATURE_2 0x06
 
 
+/* Device Pin Definitions */
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_PCINT16  	DDRH
+#define PORT_PCINT16 	PORTH
+#define PIN_PCINT16  	PINH
+#define PCINT16_IDX  	0
+
+#define DDR_PCINT17  	DDRH
+#define PORT_PCINT17 	PORTH
+#define PIN_PCINT17  	PINH
+#define PCINT17_IDX  	1
+
+#define DDR_PCINT18  	DDRH
+#define PORT_PCINT18 	PORTH
+#define PIN_PCINT18  	PINH
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRH
+#define PORT_PCINT19 	PORTH
+#define PIN_PCINT19  	PINH
+#define PCINT19_IDX  	3
+
+#define DDR_PCINT20  	DDRH
+#define PORT_PCINT20 	PORTH
+#define PIN_PCINT20  	PINH
+#define PCINT20_IDX  	4
+
+#define DDR_PCINT21  	DDRH
+#define PORT_PCINT21 	PORTH
+#define PIN_PCINT21  	PINH
+#define PCINT21_IDX  	5
+
+#define DDR_PCINT22  	DDRH
+#define PORT_PCINT22 	PORTH
+#define PIN_PCINT22  	PINH
+#define PCINT22_IDX  	6
+
+#define DDR_PCINT23  	DDRH
+#define PORT_PCINT23 	PORTH
+#define PIN_PCINT23  	PINH
+#define PCINT23_IDX  	7
+
+#define DDR_PCINT24  	DDRJ
+#define PORT_PCINT24 	PORTJ
+#define PIN_PCINT24  	PINJ
+#define PCINT24_IDX  	0
+
+#define DDR_PCINT25  	DDRJ
+#define PORT_PCINT25 	PORTJ
+#define PIN_PCINT25  	PINJ
+#define PCINT25_IDX  	1
+
+#define DDR_PCINT26  	DDRJ
+#define PORT_PCINT26 	PORTJ
+#define PIN_PCINT26  	PINJ
+#define PCINT26_IDX  	2
+
+#define DDR_PCINT27  	DDRJ
+#define PORT_PCINT27 	PORTJ
+#define PIN_PCINT27  	PINJ
+#define PCINT27_IDX  	3
+
+#define DDR_PCINT28  	DDRJ
+#define PORT_PCINT28 	PORTJ
+#define PIN_PCINT28  	PINJ
+#define PCINT28_IDX  	4
+
+#define DDR_PCINT29  	DDRJ
+#define PORT_PCINT29 	PORTJ
+#define PIN_PCINT29  	PINJ
+#define PCINT29_IDX  	5
+
+#define DDR_PCINT30  	DDRJ
+#define PORT_PCINT30 	PORTJ
+#define PIN_PCINT30  	PINJ
+#define PCINT30_IDX  	6
+
+
 #endif /* _AVR_IOM6450_H_ */
Index: include/avr/iotn11.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn11.h,v
retrieving revision 1.14
diff -u -r1.14 iotn11.h
--- include/avr/iotn11.h	17 Oct 2008 23:22:44 -0000	1.14
+++ include/avr/iotn11.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002,2005 Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -109,19 +110,23 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 0 */
+#define IO_PINS_num 			2
 #define IO_PINS_vect			_VECTOR(2)
 #define SIG_PIN				_VECTOR(2)
 #define SIG_PIN_CHANGE			_VECTOR(2)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			3
 #define TIMER0_OVF_vect			_VECTOR(3)
 #define SIG_OVERFLOW0			_VECTOR(3)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			4
 #define ANA_COMP_vect			_VECTOR(4)
 #define SIG_COMPARATOR			_VECTOR(4)
 
@@ -231,4 +236,26 @@
 #define SIGNATURE_2 0x04
 
 
+/* Device Pin Definitions */
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+
 #endif /* _AVR_IOTN11_H_ */
Index: include/avr/io4434.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io4434.h,v
retrieving revision 1.12
diff -u -r1.12 io4434.h
--- include/avr/io4434.h	11 Feb 2009 17:53:34 -0000	1.12
+++ include/avr/io4434.h	26 Mar 2009 20:10:21 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -205,66 +206,82 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		3
 #define TIMER2_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(3)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			4
 #define TIMER2_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW2			_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		6
 #define TIMER1_COMPA_vect		_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		7
 #define TIMER1_COMPB_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			8
 #define TIMER1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			9
 #define TIMER0_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW0			_VECTOR(9)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			10
 #define SPI_STC_vect			_VECTOR(10)
 #define SIG_SPI				_VECTOR(10)
 
 /* UART, RX Complete */
+#define UART_RX_num 			11
 #define UART_RX_vect			_VECTOR(11)
 #define SIG_UART_RECV			_VECTOR(11)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			12
 #define UART_UDRE_vect			_VECTOR(12)
 #define SIG_UART_DATA			_VECTOR(12)
 
 /* UART, TX Complete */
+#define UART_TX_num 			13
 #define UART_TX_vect			_VECTOR(13)
 #define SIG_UART_TRANS			_VECTOR(13)
 
 /* ADC Conversion Complete */
+#define ADC_num 			14
 #define ADC_vect			_VECTOR(14)
 #define SIG_ADC				_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			16
 #define ANA_COMP_vect			_VECTOR(16)
 #define SIG_COMPARATOR			_VECTOR(16)
 
@@ -564,4 +581,121 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IO4434_H_ */
Index: include/avr/io90pwm3b.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io90pwm3b.h,v
retrieving revision 1.16
diff -u -r1.16 io90pwm3b.h
--- include/avr/io90pwm3b.h	11 Feb 2009 17:53:35 -0000	1.16
+++ include/avr/io90pwm3b.h	26 Mar 2009 20:10:23 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1291,36 +1292,64 @@
 
 /* Interrupt Vectors */
 /* Interrupt vector 0 is the reset vector. */
+#define PSC2_CAPT_num       1
 #define PSC2_CAPT_vect      _VECTOR(1)   /* PSC2 Capture Event */
+#define PSC2_EC_num         2
 #define PSC2_EC_vect        _VECTOR(2)   /* PSC2 End Cycle */
+#define PSC1_CAPT_num       3
 #define PSC1_CAPT_vect      _VECTOR(3)   /* PSC1 Capture Event */
+#define PSC1_EC_num         4
 #define PSC1_EC_vect        _VECTOR(4)   /* PSC1 End Cycle */
+#define PSC0_CAPT_num       5
 #define PSC0_CAPT_vect      _VECTOR(5)   /* PSC0 Capture Event */
+#define PSC0_EC_num         6
 #define PSC0_EC_vect        _VECTOR(6)   /* PSC0 End Cycle */
+#define ANALOG_COMP_0_num   7
 #define ANALOG_COMP_0_vect  _VECTOR(7)   /* Analog Comparator 0 */
+#define ANALOG_COMP_1_num   8
 #define ANALOG_COMP_1_vect  _VECTOR(8)   /* Analog Comparator 1 */
+#define ANALOG_COMP_2_num   9
 #define ANALOG_COMP_2_vect  _VECTOR(9)   /* Analog Comparator 2 */
+#define INT0_num            10
 #define INT0_vect           _VECTOR(10)  /* External Interrupt Request 0 */
+#define TIMER1_CAPT_num     11
 #define TIMER1_CAPT_vect    _VECTOR(11)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num    12
 #define TIMER1_COMPA_vect   _VECTOR(12)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num    13
 #define TIMER1_COMPB_vect   _VECTOR(13)  /* Timer/Counter Compare Match B */
 /* Vector 14, Reserved */
+#define TIMER1_OVF_num      15
 #define TIMER1_OVF_vect     _VECTOR(15)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num    16
 #define TIMER0_COMPA_vect   _VECTOR(16)  /* Timer/Counter0 Compare Match A */
+#define TIMER0_OVF_num      17
 #define TIMER0_OVF_vect     _VECTOR(17)  /* Timer/Counter0 Overflow */
+#define ADC_num             18
 #define ADC_vect            _VECTOR(18)  /* ADC Conversion Complete */
+#define INT1_num            19
 #define INT1_vect           _VECTOR(19)  /* External Interrupt Request 1 */
+#define SPI_STC_num         20
 #define SPI_STC_vect        _VECTOR(20)  /* SPI Serial Transfer Complete */
+#define USART_RX_num        21
 #define USART_RX_vect       _VECTOR(21)  /* USART, Rx Complete */
+#define USART_UDRE_num      22
 #define USART_UDRE_vect     _VECTOR(22)  /* USART Data Register Empty */
+#define USART_TX_num        23
 #define USART_TX_vect       _VECTOR(23)  /* USART, Tx Complete */
+#define INT2_num            24
 #define INT2_vect           _VECTOR(24)  /* External Interrupt Request 2 */
+#define WDT_num             25
 #define WDT_vect            _VECTOR(25)  /* Watchdog Timeout Interrupt */
+#define EE_READY_num        26
 #define EE_READY_vect       _VECTOR(26)  /* EEPROM Ready */
+#define TIMER0_COMPB_num    27
 #define TIMER0_COMPB_vect   _VECTOR(27)  /* Timer Counter 0 Compare Match B */
+#define INT3_num            28
 #define INT3_vect           _VECTOR(28)  /* External Interrupt Request 3 */
 /* Vector 29, Reserved */
 /* Vector 30, Reserved */
+#define SPM_READY_num       31
 #define SPM_READY_vect      _VECTOR(31)  /* Store Program Memory Read */
 
 #define _VECTORS_SIZE 64
@@ -1389,4 +1418,296 @@
 #define SIGNATURE_2 0x83
 
 
+/* Device Pin Definitions */
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	0
+
+#define DDR_PSCOUT20  	DDRB
+#define PORT_PSCOUT20 	PORTB
+#define PIN_PSCOUT20  	PINB
+#define PSCOUT20_IDX  	0
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	1
+
+#define DDR_PSCOUT21  	DDRB
+#define PORT_PSCOUT21 	PORTB
+#define PIN_PSCOUT21  	PINB
+#define PSCOUT21_IDX  	1
+
+#define DDR_ADC5  	DDRB
+#define PORT_ADC5 	PORTB
+#define PIN_ADC5  	PINB
+#define ADC5_IDX  	2
+
+#define DDR_INT1  	DDRB
+#define PORT_INT1 	PORTB
+#define PIN_INT1  	PINB
+#define INT1_IDX  	2
+
+#define DDR_AMP0_N  	DDRB
+#define PORT_AMP0_N 	PORTB
+#define PIN_AMP0_N  	PINB
+#define AMP0_N_IDX  	3
+
+#define DDR_AMP0_P  	DDRB
+#define PORT_AMP0_P 	PORTB
+#define PIN_AMP0_P  	PINB
+#define AMP0_P_IDX  	4
+
+#define DDR_ADC6  	DDRB
+#define PORT_ADC6 	PORTB
+#define PIN_ADC6  	PINB
+#define ADC6_IDX  	5
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	5
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	6
+
+#define DDR_PSCOUT11  	DDRB
+#define PORT_PSCOUT11 	PORTB
+#define PIN_PSCOUT11  	PINB
+#define PSCOUT11_IDX  	6
+
+#define DDR_ICP1B  	DDRB
+#define PORT_ICP1B 	PORTB
+#define PIN_ICP1B  	PINB
+#define ICP1B_IDX  	6
+
+#define DDR_ADC4  	DDRB
+#define PORT_ADC4 	PORTB
+#define PIN_ADC4  	PINB
+#define ADC4_IDX  	7
+
+#define DDR_PSCOUT01  	DDRB
+#define PORT_PSCOUT01 	PORTB
+#define PIN_PSCOUT01  	PINB
+#define PSCOUT01_IDX  	7
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_INT3  	DDRC
+#define PORT_INT3 	PORTC
+#define PIN_INT3  	PINC
+#define INT3_IDX  	0
+
+#define DDR_PSCOUT10  	DDRC
+#define PORT_PSCOUT10 	PORTC
+#define PIN_PSCOUT10  	PINC
+#define PSCOUT10_IDX  	0
+
+#define DDR_PSCIN1  	DDRC
+#define PORT_PSCIN1 	PORTC
+#define PIN_PSCIN1  	PINC
+#define PSCIN1_IDX  	1
+
+#define DDR_OC1B  	DDRC
+#define PORT_OC1B 	PORTC
+#define PIN_OC1B  	PINC
+#define OC1B_IDX  	1
+
+#define DDR_T0  	DDRC
+#define PORT_T0 	PORTC
+#define PIN_T0  	PINC
+#define T0_IDX  	2
+
+#define DDR_PSCOUT22  	DDRC
+#define PORT_PSCOUT22 	PORTC
+#define PIN_PSCOUT22  	PINC
+#define PSCOUT22_IDX  	2
+
+#define DDR_T1  	DDRC
+#define PORT_T1 	PORTC
+#define PIN_T1  	PINC
+#define T1_IDX  	3
+
+#define DDR_PSCOUT23  	DDRC
+#define PORT_PSCOUT23 	PORTC
+#define PIN_PSCOUT23  	PINC
+#define PSCOUT23_IDX  	3
+
+#define DDR_ADC8  	DDRC
+#define PORT_ADC8 	PORTC
+#define PIN_ADC8  	PINC
+#define ADC8_IDX  	4
+
+#define DDR_AMP1_N  	DDRC
+#define PORT_AMP1_N 	PORTC
+#define PIN_AMP1_N  	PINC
+#define AMP1_N_IDX  	4
+
+#define DDR_ADC9  	DDRC
+#define PORT_ADC9 	PORTC
+#define PIN_ADC9  	PINC
+#define ADC9_IDX  	5
+
+#define DDR_AMP1_P  	DDRC
+#define PORT_AMP1_P 	PORTC
+#define PIN_AMP1_P  	PINC
+#define AMP1_P_IDX  	5
+
+#define DDR_ADC10  	DDRC
+#define PORT_ADC10 	PORTC
+#define PIN_ADC10  	PINC
+#define ADC10_IDX  	6
+
+#define DDR_ACMP1  	DDRC
+#define PORT_ACMP1 	PORTC
+#define PIN_ACMP1  	PINC
+#define ACMP1_IDX  	6
+
+#define DDR_D2A  	DDRC
+#define PORT_D2A 	PORTC
+#define PIN_D2A  	PINC
+#define D2A_IDX  	7
+
+#define DDR_PSCOUT00  	DDRD
+#define PORT_PSCOUT00 	PORTD
+#define PIN_PSCOUT00  	PIND
+#define PSCOUT00_IDX  	0
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	0
+
+#define DDR_SSA  	DDRD
+#define PORT_SSA 	PORTD
+#define PIN_SSA  	PIND
+#define SSA_IDX  	0
+
+#define DDR_PSCIN0  	DDRD
+#define PORT_PSCIN0 	PORTD
+#define PIN_PSCIN0  	PIND
+#define PSCIN0_IDX  	1
+
+#define DDR_CLKO  	DDRD
+#define PORT_CLKO 	PORTD
+#define PIN_CLKO  	PIND
+#define CLKO_IDX  	1
+
+#define DDR_PSCIN2  	DDRD
+#define PORT_PSCIN2 	PORTD
+#define PIN_PSCIN2  	PIND
+#define PSCIN2_IDX  	2
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	2
+
+#define DDR_MISO_A  	DDRD
+#define PORT_MISO_A 	PORTD
+#define PIN_MISO_A  	PIND
+#define MISO_A_IDX  	2
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	3
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	3
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	3
+
+#define DDR_SS  	DDRD
+#define PORT_SS 	PORTD
+#define PIN_SS  	PIND
+#define SS_IDX  	3
+
+#define DDR_MOSI_A  	DDRD
+#define PORT_MOSI_A 	PORTD
+#define PIN_MOSI_A  	PIND
+#define MOSI_A_IDX  	3
+
+#define DDR_ADC1  	DDRD
+#define PORT_ADC1 	PORTD
+#define PIN_ADC1  	PIND
+#define ADC1_IDX  	4
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	4
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	4
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	4
+
+#define DDR_SCK_A  	DDRD
+#define PORT_SCK_A 	PORTD
+#define PIN_SCK_A  	PIND
+#define SCK_A_IDX  	4
+
+#define DDR_ADC2  	DDRD
+#define PORT_ADC2 	PORTD
+#define PIN_ADC2  	PIND
+#define ADC2_IDX  	5
+
+#define DDR_ACOMP2  	DDRD
+#define PORT_ACOMP2 	PORTD
+#define PIN_ACOMP2  	PIND
+#define ACOMP2_IDX  	5
+
+#define DDR_ADC3  	DDRD
+#define PORT_ADC3 	PORTD
+#define PIN_ADC3  	PIND
+#define ADC3_IDX  	6
+
+#define DDR_ACMPM  	DDRD
+#define PORT_ACMPM 	PORTD
+#define PIN_ACMPM  	PIND
+#define ACMPM_IDX  	6
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	6
+
+#define DDR_ACMP0  	DDRD
+#define PORT_ACMP0 	PORTD
+#define PIN_ACMP0  	PIND
+#define ACMP0_IDX  	7
+
+#define DDR_OCD  	DDRE
+#define PORT_OCD 	PORTE
+#define PIN_OCD  	PINE
+#define OCD_IDX  	0
+
+#define DDR_OC0B  	DDRE
+#define PORT_OC0B 	PORTE
+#define PIN_OC0B  	PINE
+#define OC0B_IDX  	1
+
+#define DDR_ADC0  	DDRE
+#define PORT_ADC0 	PORTE
+#define PIN_ADC0  	PINE
+#define ADC0_IDX  	2
+
+
 #endif /* _AVR_IO90PWM3B_H_ */
Index: include/avr/io90pwmx.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io90pwmx.h,v
retrieving revision 1.15
diff -u -r1.15 io90pwmx.h
--- include/avr/io90pwmx.h	11 Feb 2009 17:53:35 -0000	1.15
+++ include/avr/io90pwmx.h	26 Mar 2009 20:10:24 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2005, Andrey Pashchenko
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1194,122 +1195,150 @@
 
 /* Interrupt vectors */
 /* PSC2 Capture Event */
+#define PSC2_CAPT_num 			1
 #define PSC2_CAPT_vect			_VECTOR(1)
 #define SIG_PSC2_CAPTURE		_VECTOR(1)
 
 /* PSC2 End Cycle */
+#define PSC2_EC_num 			2
 #define PSC2_EC_vect			_VECTOR(2)
 #define SIG_PSC2_END_CYCLE		_VECTOR(2)
 
 /* PSC1 Capture Event */
+#define PSC1_CAPT_num 			3
 #define PSC1_CAPT_vect			_VECTOR(3)
 #define SIG_PSC1_CAPTURE		_VECTOR(3)
 
 /* PSC1 End Cycle */
+#define PSC1_EC_num 			4
 #define PSC1_EC_vect			_VECTOR(4)
 #define SIG_PSC1_END_CYCLE		_VECTOR(4)
 
 /* PSC0 Capture Event */
+#define PSC0_CAPT_num 			5
 #define PSC0_CAPT_vect			_VECTOR(5)
 #define SIG_PSC0_CAPTURE		_VECTOR(5)
 
 /* PSC0 End Cycle */
+#define PSC0_EC_num 			6
 #define PSC0_EC_vect			_VECTOR(6)
 #define SIG_PSC0_END_CYCLE		_VECTOR(6)
 
 /* Analog Comparator 0 */
+#define ANALOG_COMP_0_num 		7
 #define ANALOG_COMP_0_vect		_VECTOR(7)
 #define SIG_COMPARATOR0			_VECTOR(7)
 
 /* Analog Comparator 1 */
+#define ANALOG_COMP_1_num 		8
 #define ANALOG_COMP_1_vect		_VECTOR(8)
 #define SIG_COMPARATOR1			_VECTOR(8)
 
 /* Analog Comparator 2 */
+#define ANALOG_COMP_2_num 		9
 #define ANALOG_COMP_2_vect		_VECTOR(9)
 #define SIG_COMPARATOR2			_VECTOR(9)
 
 /* External Interrupt Request 0 */
+#define INT0_num 			10
 #define INT0_vect			_VECTOR(10)
 #define SIG_INTERRUPT0			_VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		11
 #define TIMER1_CAPT_vect		_VECTOR(11)
 #define SIG_INPUT_CAPTURE1		_VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		12
 #define TIMER1_COMPA_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1_A		_VECTOR(12)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		13
 #define TIMER1_COMPB_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1_B		_VECTOR(13)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			15
 #define TIMER1_OVF_vect			_VECTOR(15)
 #define SIG_OVERFLOW1			_VECTOR(15)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMP_A_num 		16
 #define TIMER0_COMP_A_vect		_VECTOR(16)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(16)
 #define SIG_OUTPUT_COMPARE0_A		_VECTOR(16)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			17
 #define TIMER0_OVF_vect			_VECTOR(17)
 #define SIG_OVERFLOW0			_VECTOR(17)
 
 /* ADC Conversion Complete */
+#define ADC_num 			18
 #define ADC_vect			_VECTOR(18)
 #define SIG_ADC				_VECTOR(18)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			19
 #define INT1_vect			_VECTOR(19)
 #define SIG_INTERRUPT1			_VECTOR(19)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			20
 #define SPI_STC_vect			_VECTOR(20)
 #define SIG_SPI				_VECTOR(20)
 
 /* USART, Rx Complete */
+#define USART_RX_num 			21
 #define USART_RX_vect			_VECTOR(21)
 #define SIG_USART_RECV			_VECTOR(21)
 #define SIG_UART_RECV			_VECTOR(21)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			22
 #define USART_UDRE_vect			_VECTOR(22)
 #define SIG_USART_DATA			_VECTOR(22)
 #define SIG_UART_DATA			_VECTOR(22)
 
 /* USART, Tx Complete */
+#define USART_TX_num 			23
 #define USART_TX_vect			_VECTOR(23)
 #define SIG_USART_TRANS			_VECTOR(23)
 #define SIG_UART_TRANS			_VECTOR(23)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			24
 #define INT2_vect			_VECTOR(24)
 #define SIG_INTERRUPT2			_VECTOR(24)
 
 /* Watchdog Timeout Interrupt */
+#define WDT_num 			25
 #define WDT_vect			_VECTOR(25)
 #define SIG_WDT				_VECTOR(25)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(25)
 
 /* EEPROM Ready */
+#define EE_READY_num 			26
 #define EE_READY_vect			_VECTOR(26)
 #define SIG_EEPROM_READY		_VECTOR(26)
 
 /* Timer Counter 0 Compare Match B */
+#define TIMER0_COMPB_num 		27
 #define TIMER0_COMPB_vect		_VECTOR(27)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(27)
 #define SIG_OUTPUT_COMPARE0_B		_VECTOR(27)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			28
 #define INT3_vect			_VECTOR(28)
 #define SIG_INTERRUPT3			_VECTOR(28)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			31
 #define SPM_READY_vect			_VECTOR(31)
 #define SIG_SPM_READY			_VECTOR(31)
 
@@ -1368,4 +1397,296 @@
 #define __BOOT_LOCK_BITS_1_EXIST 
 
 
+/* Device Pin Definitions */
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	0
+
+#define DDR_PSCOUT20  	DDRB
+#define PORT_PSCOUT20 	PORTB
+#define PIN_PSCOUT20  	PINB
+#define PSCOUT20_IDX  	0
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	1
+
+#define DDR_PSCOUT21  	DDRB
+#define PORT_PSCOUT21 	PORTB
+#define PIN_PSCOUT21  	PINB
+#define PSCOUT21_IDX  	1
+
+#define DDR_ADC5  	DDRB
+#define PORT_ADC5 	PORTB
+#define PIN_ADC5  	PINB
+#define ADC5_IDX  	2
+
+#define DDR_INT1  	DDRB
+#define PORT_INT1 	PORTB
+#define PIN_INT1  	PINB
+#define INT1_IDX  	2
+
+#define DDR_AMP0_N  	DDRB
+#define PORT_AMP0_N 	PORTB
+#define PIN_AMP0_N  	PINB
+#define AMP0_N_IDX  	3
+
+#define DDR_AMP0_P  	DDRB
+#define PORT_AMP0_P 	PORTB
+#define PIN_AMP0_P  	PINB
+#define AMP0_P_IDX  	4
+
+#define DDR_ADC6  	DDRB
+#define PORT_ADC6 	PORTB
+#define PIN_ADC6  	PINB
+#define ADC6_IDX  	5
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	5
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	6
+
+#define DDR_PSCOUT11  	DDRB
+#define PORT_PSCOUT11 	PORTB
+#define PIN_PSCOUT11  	PINB
+#define PSCOUT11_IDX  	6
+
+#define DDR_ICP1B  	DDRB
+#define PORT_ICP1B 	PORTB
+#define PIN_ICP1B  	PINB
+#define ICP1B_IDX  	6
+
+#define DDR_ADC4  	DDRB
+#define PORT_ADC4 	PORTB
+#define PIN_ADC4  	PINB
+#define ADC4_IDX  	7
+
+#define DDR_PSCOUT01  	DDRB
+#define PORT_PSCOUT01 	PORTB
+#define PIN_PSCOUT01  	PINB
+#define PSCOUT01_IDX  	7
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_INT3  	DDRC
+#define PORT_INT3 	PORTC
+#define PIN_INT3  	PINC
+#define INT3_IDX  	0
+
+#define DDR_PSCOUT10  	DDRC
+#define PORT_PSCOUT10 	PORTC
+#define PIN_PSCOUT10  	PINC
+#define PSCOUT10_IDX  	0
+
+#define DDR_PSCIN1  	DDRC
+#define PORT_PSCIN1 	PORTC
+#define PIN_PSCIN1  	PINC
+#define PSCIN1_IDX  	1
+
+#define DDR_OC1B  	DDRC
+#define PORT_OC1B 	PORTC
+#define PIN_OC1B  	PINC
+#define OC1B_IDX  	1
+
+#define DDR_T0  	DDRC
+#define PORT_T0 	PORTC
+#define PIN_T0  	PINC
+#define T0_IDX  	2
+
+#define DDR_PSCOUT22  	DDRC
+#define PORT_PSCOUT22 	PORTC
+#define PIN_PSCOUT22  	PINC
+#define PSCOUT22_IDX  	2
+
+#define DDR_T1  	DDRC
+#define PORT_T1 	PORTC
+#define PIN_T1  	PINC
+#define T1_IDX  	3
+
+#define DDR_PSCOUT23  	DDRC
+#define PORT_PSCOUT23 	PORTC
+#define PIN_PSCOUT23  	PINC
+#define PSCOUT23_IDX  	3
+
+#define DDR_ADC8  	DDRC
+#define PORT_ADC8 	PORTC
+#define PIN_ADC8  	PINC
+#define ADC8_IDX  	4
+
+#define DDR_AMP1_N  	DDRC
+#define PORT_AMP1_N 	PORTC
+#define PIN_AMP1_N  	PINC
+#define AMP1_N_IDX  	4
+
+#define DDR_ADC9  	DDRC
+#define PORT_ADC9 	PORTC
+#define PIN_ADC9  	PINC
+#define ADC9_IDX  	5
+
+#define DDR_AMP1_P  	DDRC
+#define PORT_AMP1_P 	PORTC
+#define PIN_AMP1_P  	PINC
+#define AMP1_P_IDX  	5
+
+#define DDR_ADC10  	DDRC
+#define PORT_ADC10 	PORTC
+#define PIN_ADC10  	PINC
+#define ADC10_IDX  	6
+
+#define DDR_ACMP1  	DDRC
+#define PORT_ACMP1 	PORTC
+#define PIN_ACMP1  	PINC
+#define ACMP1_IDX  	6
+
+#define DDR_D2A  	DDRC
+#define PORT_D2A 	PORTC
+#define PIN_D2A  	PINC
+#define D2A_IDX  	7
+
+#define DDR_PSCOUT00  	DDRD
+#define PORT_PSCOUT00 	PORTD
+#define PIN_PSCOUT00  	PIND
+#define PSCOUT00_IDX  	0
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	0
+
+#define DDR_SSA  	DDRD
+#define PORT_SSA 	PORTD
+#define PIN_SSA  	PIND
+#define SSA_IDX  	0
+
+#define DDR_PSCIN0  	DDRD
+#define PORT_PSCIN0 	PORTD
+#define PIN_PSCIN0  	PIND
+#define PSCIN0_IDX  	1
+
+#define DDR_CLKO  	DDRD
+#define PORT_CLKO 	PORTD
+#define PIN_CLKO  	PIND
+#define CLKO_IDX  	1
+
+#define DDR_PSCIN2  	DDRD
+#define PORT_PSCIN2 	PORTD
+#define PIN_PSCIN2  	PIND
+#define PSCIN2_IDX  	2
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	2
+
+#define DDR_MISO_A  	DDRD
+#define PORT_MISO_A 	PORTD
+#define PIN_MISO_A  	PIND
+#define MISO_A_IDX  	2
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	3
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	3
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	3
+
+#define DDR_SS  	DDRD
+#define PORT_SS 	PORTD
+#define PIN_SS  	PIND
+#define SS_IDX  	3
+
+#define DDR_MOSI_A  	DDRD
+#define PORT_MOSI_A 	PORTD
+#define PIN_MOSI_A  	PIND
+#define MOSI_A_IDX  	3
+
+#define DDR_ADC1  	DDRD
+#define PORT_ADC1 	PORTD
+#define PIN_ADC1  	PIND
+#define ADC1_IDX  	4
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	4
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	4
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	4
+
+#define DDR_SCK_A  	DDRD
+#define PORT_SCK_A 	PORTD
+#define PIN_SCK_A  	PIND
+#define SCK_A_IDX  	4
+
+#define DDR_ADC2  	DDRD
+#define PORT_ADC2 	PORTD
+#define PIN_ADC2  	PIND
+#define ADC2_IDX  	5
+
+#define DDR_ACOMP2  	DDRD
+#define PORT_ACOMP2 	PORTD
+#define PIN_ACOMP2  	PIND
+#define ACOMP2_IDX  	5
+
+#define DDR_ADC3  	DDRD
+#define PORT_ADC3 	PORTD
+#define PIN_ADC3  	PIND
+#define ADC3_IDX  	6
+
+#define DDR_ACMPM  	DDRD
+#define PORT_ACMPM 	PORTD
+#define PIN_ACMPM  	PIND
+#define ACMPM_IDX  	6
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	6
+
+#define DDR_ACMP0  	DDRD
+#define PORT_ACMP0 	PORTD
+#define PIN_ACMP0  	PIND
+#define ACMP0_IDX  	7
+
+#define DDR_OCD  	DDRE
+#define PORT_OCD 	PORTE
+#define PIN_OCD  	PINE
+#define OCD_IDX  	0
+
+#define DDR_OC0B  	DDRE
+#define PORT_OC0B 	PORTE
+#define PIN_OC0B  	PINE
+#define OC0B_IDX  	1
+
+#define DDR_ADC0  	DDRE
+#define PORT_ADC0 	PORTE
+#define PIN_ADC0  	PINE
+#define ADC0_IDX  	2
+
+
 #endif /* _AVR_IO90PWMX_H_ */
Index: include/avr/iom162.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom162.h,v
retrieving revision 1.19
diff -u -r1.19 iom162.h
--- include/avr/iom162.h	17 Nov 2008 16:20:00 -0000	1.19
+++ include/avr/iom162.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Nils Kristian Strom <nilsst@omegav.ntnu.no>
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -169,110 +170,137 @@
 /* Interrupt vectors (byte addresses) */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			4
 #define PCINT0_vect			_VECTOR(4)
 #define SIG_PIN_CHANGE0			_VECTOR(4)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			5
 #define PCINT1_vect			_VECTOR(5)
 #define SIG_PIN_CHANGE1			_VECTOR(5)
 
 /* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_num 		6
 #define TIMER3_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE3		_VECTOR(6)
 
 /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_num 		7
 #define TIMER3_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE3A		_VECTOR(7)
 
 /* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_num 		8
 #define TIMER3_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE3B		_VECTOR(8)
 
 /* Timer/Counter3 Overflow */
+#define TIMER3_OVF_num 			9
 #define TIMER3_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW3			_VECTOR(9)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		10
 #define TIMER2_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(10)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			11
 #define TIMER2_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW2			_VECTOR(11)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		12
 #define TIMER1_CAPT_vect		_VECTOR(12)
 #define SIG_INPUT_CAPTURE1		_VECTOR(12)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		13
 #define TIMER1_COMPA_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(13)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		14
 #define TIMER1_COMPB_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(14)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			15
 #define TIMER1_OVF_vect			_VECTOR(15)
 #define SIG_OVERFLOW1			_VECTOR(15)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		16
 #define TIMER0_COMP_vect		_VECTOR(16)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(16)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			17
 #define TIMER0_OVF_vect			_VECTOR(17)
 #define SIG_OVERFLOW0			_VECTOR(17)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			18
 #define SPI_STC_vect			_VECTOR(18)
 #define SIG_SPI				_VECTOR(18)
 
 /* USART0, Rx Complete */
+#define USART0_RXC_num 			19
 #define USART0_RXC_vect			_VECTOR(19)
 #define SIG_USART0_RECV			_VECTOR(19)
 
 /* USART1, Rx Complete */
+#define USART1_RXC_num 			20
 #define USART1_RXC_vect			_VECTOR(20)
 #define SIG_USART1_RECV			_VECTOR(20)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		21
 #define USART0_UDRE_vect		_VECTOR(21)
 #define SIG_USART0_DATA			_VECTOR(21)
 
 /* USART1, Data register Empty */
+#define USART1_UDRE_num 		22
 #define USART1_UDRE_vect		_VECTOR(22)
 #define SIG_USART1_DATA			_VECTOR(22)
 
 /* USART0, Tx Complete */
+#define USART0_TXC_num 			23
 #define USART0_TXC_vect			_VECTOR(23)
 #define SIG_USART0_TRANS		_VECTOR(23)
 
 /* USART1, Tx Complete */
+#define USART1_TXC_num 			24
 #define USART1_TXC_vect			_VECTOR(24)
 #define SIG_USART1_TRANS		_VECTOR(24)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			25
 #define EE_RDY_vect			_VECTOR(25)
 #define SIG_EEPROM_READY		_VECTOR(25)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			26
 #define ANA_COMP_vect			_VECTOR(26)
 #define SIG_COMPARATOR			_VECTOR(26)
 
 /* Store Program Memory Read */
+#define SPM_RDY_num 			27
 #define SPM_RDY_vect			_VECTOR(27)
 #define SIG_SPM_READY			_VECTOR(27)
 
@@ -949,4 +977,296 @@
 #define SIGNATURE_2 0x04
 
 
+/* Device Pin Definitions */
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	1
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_RXD1  	DDRB
+#define PORT_RXD1 	PORTB
+#define PIN_RXD1  	PINB
+#define RXD1_IDX  	2
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_TXD1  	DDRB
+#define PORT_TXD1 	PORTB
+#define PIN_TXD1  	PINB
+#define TXD1_IDX  	3
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_OC3B  	DDRB
+#define PORT_OC3B 	PORTB
+#define PIN_OC3B  	PINB
+#define OC3B_IDX  	4
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_PCINT15  	DDRC
+#define PORT_PCINT15 	PORTC
+#define PIN_PCINT15  	PINC
+#define PCINT15_IDX  	7
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_TXD0  	DDRD
+#define PORT_TXD0 	PORTD
+#define PIN_TXD0  	PIND
+#define TXD0_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	3
+
+#define DDR_XCK0  	DDRD
+#define PORT_XCK0 	PORTD
+#define PIN_XCK0  	PIND
+#define XCK0_IDX  	4
+
+#define DDR_OC3A  	DDRD
+#define PORT_OC3A 	PORTD
+#define PIN_OC3A  	PIND
+#define OC3A_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_WR  	DDRD
+#define PORT_WR 	PORTD
+#define PIN_WR  	PIND
+#define WR_IDX  	6
+
+#define DDR_RD  	DDRD
+#define PORT_RD 	PORTD
+#define PIN_RD  	PIND
+#define RD_IDX  	7
+
+#define DDR_ICP1  	DDRE
+#define PORT_ICP1 	PORTE
+#define PIN_ICP1  	PINE
+#define ICP1_IDX  	0
+
+#define DDR_INT2  	DDRE
+#define PORT_INT2 	PORTE
+#define PIN_INT2  	PINE
+#define INT2_IDX  	0
+
+#define DDR_ALE  	DDRE
+#define PORT_ALE 	PORTE
+#define PIN_ALE  	PINE
+#define ALE_IDX  	1
+
+#define DDR_OC1B  	DDRE
+#define PORT_OC1B 	PORTE
+#define PIN_OC1B  	PINE
+#define OC1B_IDX  	2
+
+
 #endif  /* _AVR_IOM162_H_ */
Index: include/avr/iotnx61.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotnx61.h,v
retrieving revision 1.7
diff -u -r1.7 iotnx61.h
--- include/avr/iotnx61.h	8 Sep 2008 16:46:58 -0000	1.7
+++ include/avr/iotnx61.h	26 Mar 2009 20:10:37 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2006, 2007 Anatoly Sokolov
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -439,77 +440,372 @@
 /* Interrupt vectors */
 /* Interrupt vector 0 is the reset vector. */
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt */
+#define PCINT_num 			2
 #define PCINT_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE			_VECTOR(2)
 
 /* Timer/Counter1 Compare Match 1A */
+#define TIMER1_COMPA_num 		3
 #define TIMER1_COMPA_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match 1B */
+#define TIMER1_COMPB_num 		4
 #define TIMER1_COMPB_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(4)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			5
 #define TIMER1_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW1			_VECTOR(5)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			6
 #define TIMER0_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW0			_VECTOR(6)
 
 /* USI Start */
+#define USI_START_num 			7
 #define USI_START_vect			_VECTOR(7)
 #define SIG_USI_START			_VECTOR(7)
 
 /* USI Overflow */
+#define USI_OVF_num 			8
 #define USI_OVF_vect			_VECTOR(8)
 #define SIG_USI_OVERFLOW		_VECTOR(8)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			9
 #define EE_RDY_vect			_VECTOR(9)
 #define SIG_EEPROM_READY		_VECTOR(9)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			10
 #define ANA_COMP_vect			_VECTOR(10)
 #define SIG_ANA_COMP			_VECTOR(10)
 #define SIG_COMPARATOR			_VECTOR(10)
 
 /* ADC Conversion Complete */
+#define ADC_num 			11
 #define ADC_vect			_VECTOR(11)
 #define SIG_ADC				_VECTOR(11)
 
 /* Watchdog Time-Out */
+#define WDT_num 			12
 #define WDT_vect			_VECTOR(12)
 #define SIG_WDT				_VECTOR(12)
 
 /* External Interrupt 1 */
+#define INT1_num 			13
 #define INT1_vect			_VECTOR(13)
 #define SIG_INTERRUPT1			_VECTOR(13)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMPA_num 		14
 #define TIMER0_COMPA_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(14)
 
 /* Timer/Counter0 Compare Match B */
+#define TIMER0_COMPB_num 		15
 #define TIMER0_COMPB_vect		_VECTOR(15)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(15)
 
 /* ADC Conversion Complete */
+#define TIMER0_CAPT_num 		16
 #define TIMER0_CAPT_vect		_VECTOR(16)
 #define SIG_INPUT_CAPTURE0		_VECTOR(16)
 
 /* Timer/Counter1 Compare Match D */
+#define TIMER1_COMPD_num 		17
 #define TIMER1_COMPD_vect		_VECTOR(17)
 #define SIG_OUTPUT_COMPARE0D		_VECTOR(17)
 
 /* Timer/Counter1 Fault Protection */
+#define FAULT_PROTECTION_num 		18
 #define FAULT_PROTECTION_vect		_VECTOR(18)
 
 #define _VECTORS_SIZE 38
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_DI  	DDRA
+#define PORT_DI 	PORTA
+#define PIN_DI  	PINA
+#define DI_IDX  	0
+
+#define DDR_SDA  	DDRA
+#define PORT_SDA 	PORTA
+#define PIN_SDA  	PINA
+#define SDA_IDX  	0
+
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_DO  	DDRA
+#define PORT_DO 	PORTA
+#define PIN_DO  	PINA
+#define DO_IDX  	1
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_INT1  	DDRA
+#define PORT_INT1 	PORTA
+#define PIN_INT1  	PINA
+#define INT1_IDX  	2
+
+#define DDR_USCK  	DDRA
+#define PORT_USCK 	PORTA
+#define PIN_USCK  	PINA
+#define USCK_IDX  	2
+
+#define DDR_SCL  	DDRA
+#define PORT_SCL 	PORTA
+#define PIN_SCL  	PINA
+#define SCL_IDX  	2
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	4
+
+#define DDR_ICP0  	DDRA
+#define PORT_ICP0 	PORTA
+#define PIN_ICP0  	PINA
+#define ICP0_IDX  	4
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	5
+
+#define DDR_AIN2  	DDRA
+#define PORT_AIN2 	PORTA
+#define PIN_AIN2  	PINA
+#define AIN2_IDX  	5
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_ADC5  	DDRA
+#define PORT_ADC5 	PORTA
+#define PIN_ADC5  	PINA
+#define ADC5_IDX  	6
+
+#define DDR_AIN0  	DDRA
+#define PORT_AIN0 	PORTA
+#define PIN_AIN0  	PINA
+#define AIN0_IDX  	6
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	7
+
+#define DDR_AIN1  	DDRA
+#define PORT_AIN1 	PORTA
+#define PIN_AIN1  	PINA
+#define AIN1_IDX  	7
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_DI  	DDRB
+#define PORT_DI 	PORTB
+#define PIN_DI  	PINB
+#define DI_IDX  	0
+
+#define DDR_SDA  	DDRB
+#define PORT_SDA 	PORTB
+#define PIN_SDA  	PINB
+#define SDA_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_DO  	DDRB
+#define PORT_DO 	PORTB
+#define PIN_DO  	PINB
+#define DO_IDX  	1
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_USCK  	DDRB
+#define PORT_USCK 	PORTB
+#define PIN_USCK  	PINB
+#define USCK_IDX  	2
+
+#define DDR_SCL  	DDRB
+#define PORT_SCL 	PORTB
+#define PIN_SCL  	PINB
+#define SCL_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1D  	DDRB
+#define PORT_OC1D 	PORTB
+#define PIN_OC1D  	PINB
+#define OC1D_IDX  	4
+
+#define DDR_CLKI  	DDRB
+#define PORT_CLKI 	PORTB
+#define PIN_CLKI  	PINB
+#define CLKI_IDX  	4
+
+#define DDR_ADC8  	DDRB
+#define PORT_ADC8 	PORTB
+#define PIN_ADC8  	PINB
+#define ADC8_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1D  	DDRB
+#define PORT_OC1D 	PORTB
+#define PIN_OC1D  	PINB
+#define OC1D_IDX  	5
+
+#define DDR_CKLO  	DDRB
+#define PORT_CKLO 	PORTB
+#define PIN_CKLO  	PINB
+#define CKLO_IDX  	5
+
+#define DDR_ADC9  	DDRB
+#define PORT_ADC9 	PORTB
+#define PIN_ADC9  	PINB
+#define ADC9_IDX  	6
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	6
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_ADC10  	DDRB
+#define PORT_ADC10 	PORTB
+#define PIN_ADC10  	PINB
+#define ADC10_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+
 #endif  /* _AVR_IOTNx61_H_ */
Index: include/avr/iotn12.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn12.h,v
retrieving revision 1.15
diff -u -r1.15 iotn12.h
--- include/avr/iotn12.h	17 Oct 2008 23:22:44 -0000	1.15
+++ include/avr/iotn12.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002,2005 Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -124,23 +125,28 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 0 */
+#define IO_PINS_num 			2
 #define IO_PINS_vect			_VECTOR(2)
 #define SIG_PIN				_VECTOR(2)
 #define SIG_PIN_CHANGE			_VECTOR(2)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			3
 #define TIMER0_OVF_vect			_VECTOR(3)
 #define SIG_OVERFLOW0			_VECTOR(3)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			4
 #define EE_RDY_vect			_VECTOR(4)
 #define SIG_EEPROM_READY		_VECTOR(4)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			5
 #define ANA_COMP_vect			_VECTOR(5)
 #define SIG_COMPARATOR			_VECTOR(5)
 
@@ -262,4 +268,36 @@
 #define SIGNATURE_2 0x05
 
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_CLOCK  	DDRB
+#define PORT_CLOCK 	PORTB
+#define PIN_CLOCK  	PINB
+#define CLOCK_IDX  	3
+
+
 #endif /* _AVR_IOTN12_H_ */
Index: include/avr/iotnx4.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotnx4.h,v
retrieving revision 1.6
diff -u -r1.6 iotnx4.h
--- include/avr/iotnx4.h	7 Feb 2009 19:24:23 -0000	1.6
+++ include/avr/iotnx4.h	26 Mar 2009 20:10:36 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2005,2007 Anatoly Sokolov
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -384,73 +385,290 @@
 /* Interrupt vectors */
 /* Interrupt vector 0 is the reset vector. */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
+#define EXT_INT0_num 			1
 #define EXT_INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Watchdog Time-out */
+#define WDT_num 			4
 #define WDT_vect			_VECTOR(4)
+#define WATCHDOG_num 			4
 #define WATCHDOG_vect			_VECTOR(4)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
+#define TIM1_CAPT_num 			5
 #define TIM1_CAPT_vect			_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIM1_COMPA_num 			6
 #define TIM1_COMPA_vect			_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIM1_COMPB_num 			7
 #define TIM1_COMPB_vect			_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIM1_OVF_num 			8
 #define TIM1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Compare Match A */
+#define TIM0_COMPA_num 			9
 #define TIM0_COMPA_vect			_VECTOR(9)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(9)
 
 /* Timer/Counter0 Compare Match B */
+#define TIM0_COMPB_num 			10
 #define TIM0_COMPB_vect			_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIM0_OVF_num 			11
 #define TIM0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			12
 #define ANA_COMP_vect			_VECTOR(12)
 #define SIG_COMPARATOR			_VECTOR(12)
 
 /* ADC Conversion Complete */
+#define ADC_num 			13
 #define ADC_vect			_VECTOR(13)
 #define SIG_ADC				_VECTOR(13)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			14
 #define EE_RDY_vect			_VECTOR(14)
 #define SIG_EEPROM_READY		_VECTOR(14)
 
 /* USI START */
+#define USI_START_num 			15
 #define USI_START_vect			_VECTOR(15)
+#define USI_STR_num 			15
 #define USI_STR_vect			_VECTOR(15)
 #define SIG_USI_START			_VECTOR(15)
 
 /* USI Overflow */
+#define USI_OVF_num 			16
 #define USI_OVF_vect			_VECTOR(16)
 #define SIG_USI_OVERFLOW		_VECTOR(16)
 
 #define _VECTORS_SIZE 34
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_AIN0  	DDRA
+#define PORT_AIN0 	PORTA
+#define PIN_AIN0  	PINA
+#define AIN0_IDX  	1
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_AIN1  	DDRA
+#define PORT_AIN1 	PORTA
+#define PIN_AIN1  	PINA
+#define AIN1_IDX  	2
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_T0  	DDRA
+#define PORT_T0 	PORTA
+#define PIN_T0  	PINA
+#define T0_IDX  	3
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_USCK  	DDRA
+#define PORT_USCK 	PORTA
+#define PIN_USCK  	PINA
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRA
+#define PORT_SCL 	PORTA
+#define PIN_SCL  	PINA
+#define SCL_IDX  	4
+
+#define DDR_T1  	DDRA
+#define PORT_T1 	PORTA
+#define PIN_T1  	PINA
+#define T1_IDX  	4
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_ADC5  	DDRA
+#define PORT_ADC5 	PORTA
+#define PIN_ADC5  	PINA
+#define ADC5_IDX  	5
+
+#define DDR_DO  	DDRA
+#define PORT_DO 	PORTA
+#define PIN_DO  	PINA
+#define DO_IDX  	5
+
+#define DDR_MISO  	DDRA
+#define PORT_MISO 	PORTA
+#define PIN_MISO  	PINA
+#define MISO_IDX  	5
+
+#define DDR_OC1B  	DDRA
+#define PORT_OC1B 	PORTA
+#define PIN_OC1B  	PINA
+#define OC1B_IDX  	5
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_OC1A  	DDRA
+#define PORT_OC1A 	PORTA
+#define PIN_OC1A  	PINA
+#define OC1A_IDX  	6
+
+#define DDR_DI  	DDRA
+#define PORT_DI 	PORTA
+#define PIN_DI  	PINA
+#define DI_IDX  	6
+
+#define DDR_SDA  	DDRA
+#define PORT_SDA 	PORTA
+#define PIN_SDA  	PINA
+#define SDA_IDX  	6
+
+#define DDR_MOSI  	DDRA
+#define PORT_MOSI 	PORTA
+#define PIN_MOSI  	PINA
+#define MOSI_IDX  	6
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_ICP1  	DDRA
+#define PORT_ICP1 	PORTA
+#define PIN_ICP1  	PINA
+#define ICP1_IDX  	7
+
+#define DDR_OC0B  	DDRA
+#define PORT_OC0B 	PORTA
+#define PIN_OC0B  	PINA
+#define OC0B_IDX  	7
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	2
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	2
+
+#define DDR_CKOUT  	DDRB
+#define PORT_CKOUT 	PORTB
+#define PIN_CKOUT  	PINB
+#define CKOUT_IDX  	2
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_dW  	DDRB
+#define PORT_dW 	PORTB
+#define PIN_dW  	PINB
+#define dW_IDX  	3
+
+
 #endif /* _AVR_IOTNX4_H_ */
Index: include/avr/iom32.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom32.h,v
retrieving revision 1.17
diff -u -r1.17 iom32.h
--- include/avr/iom32.h	11 Feb 2009 17:53:36 -0000	1.17
+++ include/avr/iom32.h	26 Mar 2009 20:10:28 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Steinar Haugen
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -171,85 +172,105 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART, Rx Complete */
+#define USART_RXC_num 			13
 #define USART_RXC_vect			_VECTOR(13)
 #define SIG_USART_RECV			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			14
 #define USART_UDRE_vect			_VECTOR(14)
 #define SIG_USART_DATA			_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART, Tx Complete */
+#define USART_TXC_num 			15
 #define USART_TXC_vect			_VECTOR(15)
 #define SIG_USART_TRANS			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* ADC Conversion Complete */
+#define ADC_num 			16
 #define ADC_vect			_VECTOR(16)
 #define SIG_ADC				_VECTOR(16)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			17
 #define EE_RDY_vect			_VECTOR(17)
 #define SIG_EEPROM_READY		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			18
 #define ANA_COMP_vect			_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			19
 #define TWI_vect			_VECTOR(19)
 #define SIG_2WIRE_SERIAL		_VECTOR(19)
 
 /* Store Program Memory Ready */
+#define SPM_RDY_num 			20
 #define SPM_RDY_vect			_VECTOR(20)
 #define SIG_SPM_READY			_VECTOR(20)
 
@@ -693,4 +714,146 @@
 #define SIGNATURE_2 0x02
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_XCK  	DDRB
+#define PORT_XCK 	PORTB
+#define PIN_XCK  	PINB
+#define XCK_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IOM32_H_ */
Index: include/avr/iom128.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom128.h,v
retrieving revision 1.26
diff -u -r1.26 iom128.h
--- include/avr/iom128.h	17 Oct 2008 23:22:41 -0000	1.26
+++ include/avr/iom128.h	26 Mar 2009 20:10:27 -0000
@@ -1,5 +1,6 @@
 /* Copyright (c) 2002, Peter Jansen
    Copyright (c) 2007, Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -362,144 +363,178 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 #define SIG_INTERRUPT3			_VECTOR(4)
 
 /* External Interrupt Request 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 #define SIG_INTERRUPT4			_VECTOR(5)
 
 /* External Interrupt Request 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 #define SIG_INTERRUPT5			_VECTOR(6)
 
 /* External Interrupt Request 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 #define SIG_INTERRUPT6			_VECTOR(7)
 
 /* External Interrupt Request 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 #define SIG_INTERRUPT7			_VECTOR(8)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		9
 #define TIMER2_COMP_vect		_VECTOR(9)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(9)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			10
 #define TIMER2_OVF_vect			_VECTOR(10)
 #define SIG_OVERFLOW2			_VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		11
 #define TIMER1_CAPT_vect		_VECTOR(11)
 #define SIG_INPUT_CAPTURE1		_VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		12
 #define TIMER1_COMPA_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(12)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		13
 #define TIMER1_COMPB_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(13)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			14
 #define TIMER1_OVF_vect			_VECTOR(14)
 #define SIG_OVERFLOW1			_VECTOR(14)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		15
 #define TIMER0_COMP_vect		_VECTOR(15)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(15)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			16
 #define TIMER0_OVF_vect			_VECTOR(16)
 #define SIG_OVERFLOW0			_VECTOR(16)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			17
 #define SPI_STC_vect			_VECTOR(17)
 #define SIG_SPI				_VECTOR(17)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			18
 #define USART0_RX_vect			_VECTOR(18)
 #define SIG_USART0_RECV			_VECTOR(18)
 #define SIG_UART0_RECV			_VECTOR(18)
 
 /* USART0 Data Register Empty */
+#define USART0_UDRE_num 		19
 #define USART0_UDRE_vect		_VECTOR(19)
 #define SIG_USART0_DATA			_VECTOR(19)
 #define SIG_UART0_DATA			_VECTOR(19)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			20
 #define USART0_TX_vect			_VECTOR(20)
 #define SIG_USART0_TRANS		_VECTOR(20)
 #define SIG_UART0_TRANS			_VECTOR(20)
 
 /* ADC Conversion Complete */
+#define ADC_num 			21
 #define ADC_vect			_VECTOR(21)
 #define SIG_ADC				_VECTOR(21)
 
 /* EEPROM Ready */
+#define EE_READY_num 			22
 #define EE_READY_vect			_VECTOR(22)
 #define SIG_EEPROM_READY		_VECTOR(22)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		23
 #define ANALOG_COMP_vect		_VECTOR(23)
 #define SIG_COMPARATOR			_VECTOR(23)
 
 /* Timer/Counter1 Compare Match C */
+#define TIMER1_COMPC_num 		24
 #define TIMER1_COMPC_vect		_VECTOR(24)
 #define SIG_OUTPUT_COMPARE1C		_VECTOR(24)
 
 /* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_num 		25
 #define TIMER3_CAPT_vect		_VECTOR(25)
 #define SIG_INPUT_CAPTURE3		_VECTOR(25)
 
 /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_num 		26
 #define TIMER3_COMPA_vect		_VECTOR(26)
 #define SIG_OUTPUT_COMPARE3A		_VECTOR(26)
 
 /* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_num 		27
 #define TIMER3_COMPB_vect		_VECTOR(27)
 #define SIG_OUTPUT_COMPARE3B		_VECTOR(27)
 
 /* Timer/Counter3 Compare Match C */
+#define TIMER3_COMPC_num 		28
 #define TIMER3_COMPC_vect		_VECTOR(28)
 #define SIG_OUTPUT_COMPARE3C		_VECTOR(28)
 
 /* Timer/Counter3 Overflow */
+#define TIMER3_OVF_num 			29
 #define TIMER3_OVF_vect			_VECTOR(29)
 #define SIG_OVERFLOW3			_VECTOR(29)
 
 /* USART1, Rx Complete */
+#define USART1_RX_num 			30
 #define USART1_RX_vect			_VECTOR(30)
 #define SIG_USART1_RECV			_VECTOR(30)
 #define SIG_UART1_RECV			_VECTOR(30)
 
 /* USART1, Data Register Empty */
+#define USART1_UDRE_num 		31
 #define USART1_UDRE_vect		_VECTOR(31)
 #define SIG_USART1_DATA			_VECTOR(31)
 #define SIG_UART1_DATA			_VECTOR(31)
 
 /* USART1, Tx Complete */
+#define USART1_TX_num 			32
 #define USART1_TX_vect			_VECTOR(32)
 #define SIG_USART1_TRANS		_VECTOR(32)
 #define SIG_UART1_TRANS			_VECTOR(32)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			33
 #define TWI_vect			_VECTOR(33)
 #define SIG_2WIRE_SERIAL		_VECTOR(33)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			34
 #define SPM_READY_vect			_VECTOR(34)
 #define SIG_SPM_READY			_VECTOR(34)
 
@@ -1200,4 +1235,326 @@
 #define SIGNATURE_2 0x02
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PWM1A  	DDRB
+#define PORT_PWM1A 	PORTB
+#define PIN_PWM1A  	PINB
+#define PWM1A_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PWM1B  	DDRB
+#define PORT_PWM1B 	PORTB
+#define PIN_PWM1B  	PINB
+#define PWM1B_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_OC1C  	DDRB
+#define PORT_OC1C 	PORTB
+#define PIN_OC1C  	PINB
+#define OC1C_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_SCL  	DDRD
+#define PORT_SCL 	PORTD
+#define PIN_SCL  	PIND
+#define SCL_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	0
+
+#define DDR_SDA  	DDRD
+#define PORT_SDA 	PORTD
+#define PIN_SDA  	PIND
+#define SDA_IDX  	1
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	1
+
+#define DDR_RXD1  	DDRD
+#define PORT_RXD1 	PORTD
+#define PIN_RXD1  	PIND
+#define RXD1_IDX  	2
+
+#define DDR_INT2  	DDRD
+#define PORT_INT2 	PORTD
+#define PIN_INT2  	PIND
+#define INT2_IDX  	2
+
+#define DDR_TXD1  	DDRD
+#define PORT_TXD1 	PORTD
+#define PIN_TXD1  	PIND
+#define TXD1_IDX  	3
+
+#define DDR_INT3  	DDRD
+#define PORT_INT3 	PORTD
+#define PIN_INT3  	PIND
+#define INT3_IDX  	3
+
+#define DDR_IC1  	DDRD
+#define PORT_IC1 	PORTD
+#define PIN_IC1  	PIND
+#define IC1_IDX  	4
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	5
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	6
+
+#define DDR_T2  	DDRD
+#define PORT_T2 	PORTD
+#define PIN_T2  	PIND
+#define T2_IDX  	7
+
+#define DDR_RXD0  	DDRE
+#define PORT_RXD0 	PORTE
+#define PIN_RXD0  	PINE
+#define RXD0_IDX  	0
+
+#define DDR_TXD0  	DDRE
+#define PORT_TXD0 	PORTE
+#define PIN_TXD0  	PINE
+#define TXD0_IDX  	1
+
+#define DDR_XCK0  	DDRE
+#define PORT_XCK0 	PORTE
+#define PIN_XCK0  	PINE
+#define XCK0_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_OC3A  	DDRE
+#define PORT_OC3A 	PORTE
+#define PIN_OC3A  	PINE
+#define OC3A_IDX  	3
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_OC3B  	DDRE
+#define PORT_OC3B 	PORTE
+#define PIN_OC3B  	PINE
+#define OC3B_IDX  	4
+
+#define DDR_INT4  	DDRE
+#define PORT_INT4 	PORTE
+#define PIN_INT4  	PINE
+#define INT4_IDX  	4
+
+#define DDR_OC3C  	DDRE
+#define PORT_OC3C 	PORTE
+#define PIN_OC3C  	PINE
+#define OC3C_IDX  	5
+
+#define DDR_INT5  	DDRE
+#define PORT_INT5 	PORTE
+#define PIN_INT5  	PINE
+#define INT5_IDX  	5
+
+#define DDR_T3  	DDRE
+#define PORT_T3 	PORTE
+#define PIN_T3  	PINE
+#define T3_IDX  	6
+
+#define DDR_INT6  	DDRE
+#define PORT_INT6 	PORTE
+#define PIN_INT6  	PINE
+#define INT6_IDX  	6
+
+#define DDR_IC3  	DDRE
+#define PORT_IC3 	PORTE
+#define PIN_IC3  	PINE
+#define IC3_IDX  	7
+
+#define DDR_INT7  	DDRE
+#define PORT_INT7 	PORTE
+#define PIN_INT7  	PINE
+#define INT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_WR  	DDRG
+#define PORT_WR 	PORTG
+#define PIN_WR  	PING
+#define WR_IDX  	0
+
+#define DDR_RD  	DDRG
+#define PORT_RD 	PORTG
+#define PIN_RD  	PING
+#define RD_IDX  	1
+
+#define DDR_ALE  	DDRG
+#define PORT_ALE 	PORTG
+#define PIN_ALE  	PING
+#define ALE_IDX  	2
+
+
 #endif /* _AVR_IOM128_H_ */
Index: include/avr/iom649.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom649.h,v
retrieving revision 1.13
diff -u -r1.13 iom649.h
--- include/avr/iom649.h	11 Feb 2009 17:53:37 -0000	1.13
+++ include/avr/iom649.h	26 Mar 2009 20:10:33 -0000
@@ -1,5 +1,6 @@
 /* Copyright (c) 2004 Eric B. Weddington
    Copyright (c) 2005,2006 Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -845,90 +846,112 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* LCD Start of Frame */
+#define LCD_num 			22
 #define LCD_vect			_VECTOR(22)
 #define SIG_LCD				_VECTOR(22)
 
@@ -989,4 +1012,371 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_COM0  	DDRA
+#define PORT_COM0 	PORTA
+#define PIN_COM0  	PINA
+#define COM0_IDX  	0
+
+#define DDR_COM1  	DDRA
+#define PORT_COM1 	PORTA
+#define PIN_COM1  	PINA
+#define COM1_IDX  	1
+
+#define DDR_COM2  	DDRA
+#define PORT_COM2 	PORTA
+#define PIN_COM2  	PINA
+#define COM2_IDX  	2
+
+#define DDR_COM3  	DDRA
+#define PORT_COM3 	PORTA
+#define PIN_COM3  	PINA
+#define COM3_IDX  	3
+
+#define DDR_SEG0  	DDRA
+#define PORT_SEG0 	PORTA
+#define PIN_SEG0  	PINA
+#define SEG0_IDX  	4
+
+#define DDR_SEG1  	DDRA
+#define PORT_SEG1 	PORTA
+#define PIN_SEG1  	PINA
+#define SEG1_IDX  	5
+
+#define DDR_SEG2  	DDRA
+#define PORT_SEG2 	PORTA
+#define PIN_SEG2  	PINA
+#define SEG2_IDX  	6
+
+#define DDR_SEG3  	DDRA
+#define PORT_SEG3 	PORTA
+#define PIN_SEG3  	PINA
+#define SEG3_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SEG12  	DDRC
+#define PORT_SEG12 	PORTC
+#define PIN_SEG12  	PINC
+#define SEG12_IDX  	0
+
+#define DDR_SEG11  	DDRC
+#define PORT_SEG11 	PORTC
+#define PIN_SEG11  	PINC
+#define SEG11_IDX  	1
+
+#define DDR_SEG10  	DDRC
+#define PORT_SEG10 	PORTC
+#define PIN_SEG10  	PINC
+#define SEG10_IDX  	2
+
+#define DDR_SEG9  	DDRC
+#define PORT_SEG9 	PORTC
+#define PIN_SEG9  	PINC
+#define SEG9_IDX  	3
+
+#define DDR_SEG8  	DDRC
+#define PORT_SEG8 	PORTC
+#define PIN_SEG8  	PINC
+#define SEG8_IDX  	4
+
+#define DDR_SEG7  	DDRC
+#define PORT_SEG7 	PORTC
+#define PIN_SEG7  	PINC
+#define SEG7_IDX  	5
+
+#define DDR_SEG6  	DDRC
+#define PORT_SEG6 	PORTC
+#define PIN_SEG6  	PINC
+#define SEG6_IDX  	6
+
+#define DDR_SEG5  	DDRC
+#define PORT_SEG5 	PORTC
+#define PIN_SEG5  	PINC
+#define SEG5_IDX  	7
+
+#define DDR_ICP/SEG22  	DDRD
+#define PORT_ICP/SEG22 	PORTD
+#define PIN_ICP/SEG22  	PIND
+#define ICP/SEG22_IDX  	0
+
+#define DDR_INT0/SEG21  	DDRD
+#define PORT_INT0/SEG21 	PORTD
+#define PIN_INT0/SEG21  	PIND
+#define INT0/SEG21_IDX  	1
+
+#define DDR_SEG20  	DDRD
+#define PORT_SEG20 	PORTD
+#define PIN_SEG20  	PIND
+#define SEG20_IDX  	2
+
+#define DDR_SEG19  	DDRD
+#define PORT_SEG19 	PORTD
+#define PIN_SEG19  	PIND
+#define SEG19_IDX  	3
+
+#define DDR_SEG18  	DDRD
+#define PORT_SEG18 	PORTD
+#define PIN_SEG18  	PIND
+#define SEG18_IDX  	4
+
+#define DDR_SEG17  	DDRD
+#define PORT_SEG17 	PORTD
+#define PIN_SEG17  	PIND
+#define SEG17_IDX  	5
+
+#define DDR_SEG16  	DDRD
+#define PORT_SEG16 	PORTD
+#define PIN_SEG16  	PIND
+#define SEG16_IDX  	6
+
+#define DDR_SEG15  	DDRD
+#define PORT_SEG15 	PORTD
+#define PIN_SEG15  	PIND
+#define SEG15_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_SEG14  	DDRG
+#define PORT_SEG14 	PORTG
+#define PIN_SEG14  	PING
+#define SEG14_IDX  	0
+
+#define DDR_SEG13  	DDRG
+#define PORT_SEG13 	PORTG
+#define PIN_SEG13  	PING
+#define SEG13_IDX  	1
+
+#define DDR_SEG4  	DDRG
+#define PORT_SEG4 	PORTG
+#define PIN_SEG4  	PING
+#define SEG4_IDX  	2
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_SEG24  	DDRG
+#define PORT_SEG24 	PORTG
+#define PIN_SEG24  	PING
+#define SEG24_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_SEG23  	DDRG
+#define PORT_SEG23 	PORTG
+#define PIN_SEG23  	PING
+#define SEG23_IDX  	4
+
+
 #endif /* _AVR_IOM649_H_ */
Index: include/avr/iom169p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom169p.h,v
retrieving revision 1.8
diff -u -r1.8 iom169p.h
--- include/avr/iom169p.h	11 Feb 2009 17:53:36 -0000	1.8
+++ include/avr/iom169p.h	26 Mar 2009 20:10:28 -0000
@@ -2,6 +2,7 @@
    Juergen Schilling <juergen.schilling@honeywell.com>
    Eric B. Weddington <ericw@evcohs.com>
    Anatoly Sokolov <aesok@post.ru>
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -884,90 +885,112 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
 #define SIG_USART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
 #define SIG_USART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_USART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* LCD Start of Frame */
+#define LCD_num 			22
 #define LCD_vect			_VECTOR(22)
 #define SIG_LCD				_VECTOR(22)
 
@@ -1027,4 +1050,371 @@
 #define SIGNATURE_2 0x05
 
 
+/* Device Pin Definitions */
+#define DDR_COM0  	DDRA
+#define PORT_COM0 	PORTA
+#define PIN_COM0  	PINA
+#define COM0_IDX  	0
+
+#define DDR_COM1  	DDRA
+#define PORT_COM1 	PORTA
+#define PIN_COM1  	PINA
+#define COM1_IDX  	1
+
+#define DDR_COM2  	DDRA
+#define PORT_COM2 	PORTA
+#define PIN_COM2  	PINA
+#define COM2_IDX  	2
+
+#define DDR_COM3  	DDRA
+#define PORT_COM3 	PORTA
+#define PIN_COM3  	PINA
+#define COM3_IDX  	3
+
+#define DDR_SEG0  	DDRA
+#define PORT_SEG0 	PORTA
+#define PIN_SEG0  	PINA
+#define SEG0_IDX  	4
+
+#define DDR_SEG1  	DDRA
+#define PORT_SEG1 	PORTA
+#define PIN_SEG1  	PINA
+#define SEG1_IDX  	5
+
+#define DDR_SEG2  	DDRA
+#define PORT_SEG2 	PORTA
+#define PIN_SEG2  	PINA
+#define SEG2_IDX  	6
+
+#define DDR_SEG3  	DDRA
+#define PORT_SEG3 	PORTA
+#define PIN_SEG3  	PINA
+#define SEG3_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SEG12  	DDRC
+#define PORT_SEG12 	PORTC
+#define PIN_SEG12  	PINC
+#define SEG12_IDX  	0
+
+#define DDR_SEG11  	DDRC
+#define PORT_SEG11 	PORTC
+#define PIN_SEG11  	PINC
+#define SEG11_IDX  	1
+
+#define DDR_SEG10  	DDRC
+#define PORT_SEG10 	PORTC
+#define PIN_SEG10  	PINC
+#define SEG10_IDX  	2
+
+#define DDR_SEG9  	DDRC
+#define PORT_SEG9 	PORTC
+#define PIN_SEG9  	PINC
+#define SEG9_IDX  	3
+
+#define DDR_SEG8  	DDRC
+#define PORT_SEG8 	PORTC
+#define PIN_SEG8  	PINC
+#define SEG8_IDX  	4
+
+#define DDR_SEG7  	DDRC
+#define PORT_SEG7 	PORTC
+#define PIN_SEG7  	PINC
+#define SEG7_IDX  	5
+
+#define DDR_SEG6  	DDRC
+#define PORT_SEG6 	PORTC
+#define PIN_SEG6  	PINC
+#define SEG6_IDX  	6
+
+#define DDR_SEG5  	DDRC
+#define PORT_SEG5 	PORTC
+#define PIN_SEG5  	PINC
+#define SEG5_IDX  	7
+
+#define DDR_ICP/SEG22  	DDRD
+#define PORT_ICP/SEG22 	PORTD
+#define PIN_ICP/SEG22  	PIND
+#define ICP/SEG22_IDX  	0
+
+#define DDR_INT0/SEG21  	DDRD
+#define PORT_INT0/SEG21 	PORTD
+#define PIN_INT0/SEG21  	PIND
+#define INT0/SEG21_IDX  	1
+
+#define DDR_SEG20  	DDRD
+#define PORT_SEG20 	PORTD
+#define PIN_SEG20  	PIND
+#define SEG20_IDX  	2
+
+#define DDR_SEG19  	DDRD
+#define PORT_SEG19 	PORTD
+#define PIN_SEG19  	PIND
+#define SEG19_IDX  	3
+
+#define DDR_SEG18  	DDRD
+#define PORT_SEG18 	PORTD
+#define PIN_SEG18  	PIND
+#define SEG18_IDX  	4
+
+#define DDR_SEG17  	DDRD
+#define PORT_SEG17 	PORTD
+#define PIN_SEG17  	PIND
+#define SEG17_IDX  	5
+
+#define DDR_SEG16  	DDRD
+#define PORT_SEG16 	PORTD
+#define PIN_SEG16  	PIND
+#define SEG16_IDX  	6
+
+#define DDR_SEG15  	DDRD
+#define PORT_SEG15 	PORTD
+#define PIN_SEG15  	PIND
+#define SEG15_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_SEG14  	DDRG
+#define PORT_SEG14 	PORTG
+#define PIN_SEG14  	PING
+#define SEG14_IDX  	0
+
+#define DDR_SEG13  	DDRG
+#define PORT_SEG13 	PORTG
+#define PIN_SEG13  	PING
+#define SEG13_IDX  	1
+
+#define DDR_SEG4  	DDRG
+#define PORT_SEG4 	PORTG
+#define PIN_SEG4  	PING
+#define SEG4_IDX  	2
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_SEG24  	DDRG
+#define PORT_SEG24 	PORTG
+#define PIN_SEG24  	PING
+#define SEG24_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_SEG23  	DDRG
+#define PORT_SEG23 	PORTG
+#define PIN_SEG23  	PING
+#define SEG23_IDX  	4
+
+
 #endif  /* _AVR_IOM169P_H_ */
Index: include/avr/iom16.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom16.h,v
retrieving revision 1.20
diff -u -r1.20 iom16.h
--- include/avr/iom16.h	11 Feb 2009 17:53:35 -0000	1.20
+++ include/avr/iom16.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -478,85 +479,105 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector. */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		3
 #define TIMER2_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(3)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			4
 #define TIMER2_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW2			_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		6
 #define TIMER1_COMPA_vect		_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		7
 #define TIMER1_COMPB_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			8
 #define TIMER1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			9
 #define TIMER0_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW0			_VECTOR(9)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			10
 #define SPI_STC_vect			_VECTOR(10)
 #define SIG_SPI				_VECTOR(10)
 
 /* USART, Rx Complete */
+#define USART_RXC_num 			11
 #define USART_RXC_vect			_VECTOR(11)
 #define SIG_USART_RECV			_VECTOR(11)
 #define SIG_UART_RECV			_VECTOR(11)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			12
 #define USART_UDRE_vect			_VECTOR(12)
 #define SIG_USART_DATA			_VECTOR(12)
 #define SIG_UART_DATA			_VECTOR(12)
 
 /* USART, Tx Complete */
+#define USART_TXC_num 			13
 #define USART_TXC_vect			_VECTOR(13)
 #define SIG_USART_TRANS			_VECTOR(13)
 #define SIG_UART_TRANS			_VECTOR(13)
 
 /* ADC Conversion Complete */
+#define ADC_num 			14
 #define ADC_vect			_VECTOR(14)
 #define SIG_ADC				_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			16
 #define ANA_COMP_vect			_VECTOR(16)
 #define SIG_COMPARATOR			_VECTOR(16)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			17
 #define TWI_vect			_VECTOR(17)
 #define SIG_2WIRE_SERIAL		_VECTOR(17)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			18
 #define INT2_vect			_VECTOR(18)
 #define SIG_INTERRUPT2			_VECTOR(18)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		19
 #define TIMER0_COMP_vect		_VECTOR(19)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(19)
 
 /* Store Program Memory Ready */
+#define SPM_RDY_num 			20
 #define SPM_RDY_vect			_VECTOR(20)
 #define SIG_SPM_READY			_VECTOR(20)
 
@@ -611,4 +632,131 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IOM16_H_ */
Index: include/avr/io2313.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io2313.h,v
retrieving revision 1.14
diff -u -r1.14 io2313.h
--- include/avr/io2313.h	11 Feb 2009 17:53:34 -0000	1.14
+++ include/avr/io2313.h	26 Mar 2009 20:10:20 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -147,42 +148,52 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT1_num 		3
 #define TIMER1_CAPT1_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match */
+#define TIMER1_COMP1_num 		4
 #define TIMER1_COMP1_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF1_num 		5
 #define TIMER1_OVF1_vect		_VECTOR(5)
 #define SIG_OVERFLOW1			_VECTOR(5)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF0_num 		6
 #define TIMER0_OVF0_vect		_VECTOR(6)
 #define SIG_OVERFLOW0			_VECTOR(6)
 
 /* UART, Rx Complete */
+#define UART_RX_num 			7
 #define UART_RX_vect			_VECTOR(7)
 #define SIG_UART_RECV			_VECTOR(7)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			8
 #define UART_UDRE_vect			_VECTOR(8)
 #define SIG_UART_DATA			_VECTOR(8)
 
 /* UART, Tx Complete */
+#define UART_TX_num 			9
 #define UART_TX_vect			_VECTOR(9)
 #define SIG_UART_TRANS			_VECTOR(9)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			10
 #define ANA_COMP_vect			_VECTOR(10)
 #define SIG_COMPARATOR			_VECTOR(10)
 
@@ -368,4 +379,71 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_OC1  	DDRB
+#define PORT_OC1 	PORTB
+#define PIN_OC1  	PINB
+#define OC1_IDX  	3
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+
 #endif  /* _AVR_IO2313_H_ */
Index: include/avr/io8535.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io8535.h,v
retrieving revision 1.13
diff -u -r1.13 io8535.h
--- include/avr/io8535.h	11 Feb 2009 17:53:34 -0000	1.13
+++ include/avr/io8535.h	26 Mar 2009 20:10:21 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -206,66 +207,82 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		3
 #define TIMER2_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(3)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			4
 #define TIMER2_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW2			_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		6
 #define TIMER1_COMPA_vect		_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		7
 #define TIMER1_COMPB_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			8
 #define TIMER1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			9
 #define TIMER0_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW0			_VECTOR(9)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			10
 #define SPI_STC_vect			_VECTOR(10)
 #define SIG_SPI				_VECTOR(10)
 
 /* UART, RX Complete */
+#define UART_RX_num 			11
 #define UART_RX_vect			_VECTOR(11)
 #define SIG_UART_RECV			_VECTOR(11)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			12
 #define UART_UDRE_vect			_VECTOR(12)
 #define SIG_UART_DATA			_VECTOR(12)
 
 /* UART, TX Complete */
+#define UART_TX_num 			13
 #define UART_TX_vect			_VECTOR(13)
 #define SIG_UART_TRANS			_VECTOR(13)
 
 /* ADC Conversion Complete */
+#define ADC_num 			14
 #define ADC_vect			_VECTOR(14)
 #define SIG_ADC				_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			16
 #define ANA_COMP_vect			_VECTOR(16)
 #define SIG_COMPARATOR			_VECTOR(16)
 
@@ -565,4 +582,121 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IO8535_H_ */
Index: include/avr/iomxx4.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iomxx4.h,v
retrieving revision 1.18
diff -u -r1.18 iomxx4.h
--- include/avr/iomxx4.h	6 Feb 2009 23:31:45 -0000	1.18
+++ include/avr/iomxx4.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2005, 2006, 2007 Anatoly Sokolov
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -733,110 +734,137 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			4
 #define PCINT0_vect			_VECTOR(4)
 #define SIG_PIN_CHANGE0			_VECTOR(4)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			5
 #define PCINT1_vect			_VECTOR(5)
 #define SIG_PIN_CHANGE1			_VECTOR(5)
 
 /* Pin Change Interrupt Request 2 */
+#define PCINT2_num 			6
 #define PCINT2_vect			_VECTOR(6)
 #define SIG_PIN_CHANGE2			_VECTOR(6)
 
 /* Pin Change Interrupt Request 3 */
+#define PCINT3_num 			7
 #define PCINT3_vect			_VECTOR(7)
 #define SIG_PIN_CHANGE3			_VECTOR(7)
 
 /* Watchdog Time-out Interrupt */
+#define WDT_num 			8
 #define WDT_vect			_VECTOR(8)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(8)
 
 /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPA_num 		9
 #define TIMER2_COMPA_vect		_VECTOR(9)
 #define SIG_OUTPUT_COMPARE2A		_VECTOR(9)
 
 /* Timer/Counter2 Compare Match B */
+#define TIMER2_COMPB_num 		10
 #define TIMER2_COMPB_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE2B		_VECTOR(10)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			11
 #define TIMER2_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW2			_VECTOR(11)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		12
 #define TIMER1_CAPT_vect		_VECTOR(12)
 #define SIG_INPUT_CAPTURE1		_VECTOR(12)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		13
 #define TIMER1_COMPA_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(13)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		14
 #define TIMER1_COMPB_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(14)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			15
 #define TIMER1_OVF_vect			_VECTOR(15)
 #define SIG_OVERFLOW1			_VECTOR(15)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMPA_num 		16
 #define TIMER0_COMPA_vect		_VECTOR(16)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(16)
 
 /* Timer/Counter0 Compare Match B */
+#define TIMER0_COMPB_num 		17
 #define TIMER0_COMPB_vect		_VECTOR(17)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(17)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			18
 #define TIMER0_OVF_vect			_VECTOR(18)
 #define SIG_OVERFLOW0			_VECTOR(18)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			19
 #define SPI_STC_vect			_VECTOR(19)
 #define SIG_SPI				_VECTOR(19)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			20
 #define USART0_RX_vect			_VECTOR(20)
 #define SIG_USART_RECV			_VECTOR(20)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		21
 #define USART0_UDRE_vect		_VECTOR(21)
 #define SIG_USART_DATA			_VECTOR(21)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			22
 #define USART0_TX_vect			_VECTOR(22)
 #define SIG_USART_TRANS			_VECTOR(22)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		23
 #define ANALOG_COMP_vect		_VECTOR(23)
 #define SIG_COMPARATOR			_VECTOR(23)
 
 /* ADC Conversion Complete */
+#define ADC_num 			24
 #define ADC_vect			_VECTOR(24)
 #define SIG_ADC				_VECTOR(24)
 
 /* EEPROM Ready */
+#define EE_READY_num 			25
 #define EE_READY_vect			_VECTOR(25)
 #define SIG_EEPROM_READY		_VECTOR(25)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			26
 #define TWI_vect			_VECTOR(26)
 #define SIG_2WIRE_SERIAL		_VECTOR(26)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			27
 #define SPM_READY_vect			_VECTOR(27)
 #define SIG_SPM_READY			_VECTOR(27)
 
@@ -848,16 +876,19 @@
 
 /* USART1, Rx Complete */
 /* USART1 RX complete */
+#define USART1_RX_num 			28
 #define USART1_RX_vect			_VECTOR(28)
 #define SIG_USART1_RECV			_VECTOR(28)
 
 /* USART1 Data register Empty */
 /* USART1 Data Register Empty */
+#define USART1_UDRE_num 		29
 #define USART1_UDRE_vect		_VECTOR(29)
 #define SIG_USART1_DATA			_VECTOR(29)
 
 /* USART1, Tx Complete */
 /* USART1 TX complete */
+#define USART1_TX_num 			30
 #define USART1_TX_vect			_VECTOR(30)
 #define SIG_USART1_TRANS		_VECTOR(30)
 
@@ -866,4 +897,326 @@
 #endif /* defined(__AVR_ATmega644__) */
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_ADC5  	DDRA
+#define PORT_ADC5 	PORTA
+#define PIN_ADC5  	PINA
+#define ADC5_IDX  	5
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_XCK  	DDRB
+#define PORT_XCK 	PORTB
+#define PIN_XCK  	PINB
+#define XCK_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_OC0B  	DDRB
+#define PORT_OC0B 	PORTB
+#define PIN_OC0B  	PINB
+#define OC0B_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_PCINT16  	DDRC
+#define PORT_PCINT16 	PORTC
+#define PIN_PCINT16  	PINC
+#define PCINT16_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_PCINT17  	DDRC
+#define PORT_PCINT17 	PORTC
+#define PIN_PCINT17  	PINC
+#define PCINT17_IDX  	1
+
+#define DDR_PCINT18  	DDRC
+#define PORT_PCINT18 	PORTC
+#define PIN_PCINT18  	PINC
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRC
+#define PORT_PCINT19 	PORTC
+#define PIN_PCINT19  	PINC
+#define PCINT19_IDX  	3
+
+#define DDR_PCINT20  	DDRC
+#define PORT_PCINT20 	PORTC
+#define PIN_PCINT20  	PINC
+#define PCINT20_IDX  	4
+
+#define DDR_PCINT21  	DDRC
+#define PORT_PCINT21 	PORTC
+#define PIN_PCINT21  	PINC
+#define PCINT21_IDX  	5
+
+#define DDR_PCINT22  	DDRC
+#define PORT_PCINT22 	PORTC
+#define PIN_PCINT22  	PINC
+#define PCINT22_IDX  	6
+
+#define DDR_PCINT23  	DDRC
+#define PORT_PCINT23 	PORTC
+#define PIN_PCINT23  	PINC
+#define PCINT23_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT24  	DDRD
+#define PORT_PCINT24 	PORTD
+#define PIN_PCINT24  	PIND
+#define PCINT24_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT25  	DDRD
+#define PORT_PCINT25 	PORTD
+#define PIN_PCINT25  	PIND
+#define PCINT25_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT26  	DDRD
+#define PORT_PCINT26 	PORTD
+#define PIN_PCINT26  	PIND
+#define PCINT26_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_PCINT27  	DDRD
+#define PORT_PCINT27 	PORTD
+#define PIN_PCINT27  	PIND
+#define PCINT27_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_PCINT28  	DDRD
+#define PORT_PCINT28 	PORTD
+#define PIN_PCINT28  	PIND
+#define PCINT28_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_PCINT29  	DDRD
+#define PORT_PCINT29 	PORTD
+#define PIN_PCINT29  	PIND
+#define PCINT29_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	6
+
+#define DDR_PCINT30  	DDRD
+#define PORT_PCINT30 	PORTD
+#define PIN_PCINT30  	PIND
+#define PCINT30_IDX  	6
+
+#define DDR_OC2A  	DDRD
+#define PORT_OC2A 	PORTD
+#define PIN_OC2A  	PIND
+#define OC2A_IDX  	7
+
+#define DDR_PCINT31  	DDRD
+#define PORT_PCINT31 	PORTD
+#define PIN_PCINT31  	PIND
+#define PCINT31_IDX  	7
+
+
 #endif /* _AVR_IOMXX4_H_ */
Index: include/avr/iom8515.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom8515.h,v
retrieving revision 1.15
diff -u -r1.15 iom8515.h
--- include/avr/iom8515.h	17 Oct 2008 23:22:44 -0000	1.15
+++ include/avr/iom8515.h	26 Mar 2009 20:10:33 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Steinar Haugen
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -209,69 +210,88 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		3
 #define TIMER1_CAPT_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		4
 #define TIMER1_COMPA_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 
 /* Timer/Counter1 Compare MatchB */
+#define TIMER1_COMPB_num 		5
 #define TIMER1_COMPB_vect		_VECTOR(5)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(5)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			6
 #define TIMER1_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW1			_VECTOR(6)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			7
 #define TIMER0_OVF_vect			_VECTOR(7)
 #define SIG_OVERFLOW0			_VECTOR(7)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			8
 #define SPI_STC_vect			_VECTOR(8)
 #define SIG_SPI				_VECTOR(8)
 
 /* UART, Rx Complete */
+#define USART_RX_num                    9
 #define USART_RX_vect                   _VECTOR(9)
+#define UART_RX_num                     9
 #define UART_RX_vect                    _VECTOR(9) /* For compatability only */
 #define SIG_UART_RECV                   _VECTOR(9) /* For compatability only */
 
 /* UART Data Register Empty */
+#define USART_UDRE_num                  10
 #define USART_UDRE_vect                 _VECTOR(10)
+#define UART_UDRE_num                   10
 #define UART_UDRE_vect                  _VECTOR(10) /* For compatability only */
 #define SIG_UART_DATA                   _VECTOR(10) /* For compatability only */
 
 /* UART, Tx Complete */
+#define USART_TX_num                    11
 #define USART_TX_vect                   _VECTOR(11)
+#define UART_TX_num                     11
 #define UART_TX_vect                    _VECTOR(11) /* For compatability only */
 #define SIG_UART_TRANS                  _VECTOR(11) /* For compatability only */
 
 /* Analog Comparator */
+#define ANA_COMP_num 			12
 #define ANA_COMP_vect			_VECTOR(12)
 #define SIG_COMPARATOR			_VECTOR(12)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			13
 #define INT2_vect			_VECTOR(13)
 #define SIG_INTERRUPT2			_VECTOR(13)
 
 /* Timer 0 Compare Match */
+#define TIMER0_COMP_num 		14
 #define TIMER0_COMP_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Store Program Memory Ready */
+#define SPM_RDY_num 			16
 #define SPM_RDY_vect			_VECTOR(16)
 #define SIG_SPM_READY			_VECTOR(16)
 
@@ -633,4 +653,191 @@
 #define SIGNATURE_2 0x06
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_WR  	DDRD
+#define PORT_WR 	PORTD
+#define PIN_WR  	PIND
+#define WR_IDX  	6
+
+#define DDR_RD  	DDRD
+#define PORT_RD 	PORTD
+#define PIN_RD  	PIND
+#define RD_IDX  	7
+
+#define DDR_ICP  	DDRE
+#define PORT_ICP 	PORTE
+#define PIN_ICP  	PINE
+#define ICP_IDX  	0
+
+#define DDR_INT2  	DDRE
+#define PORT_INT2 	PORTE
+#define PIN_INT2  	PINE
+#define INT2_IDX  	0
+
+#define DDR_ALE  	DDRE
+#define PORT_ALE 	PORTE
+#define PIN_ALE  	PINE
+#define ALE_IDX  	1
+
+#define DDR_OC1B  	DDRE
+#define PORT_OC1B 	PORTE
+#define PIN_OC1B  	PINE
+#define OC1B_IDX  	2
+
+
 #endif /* _AVR_IOM8515_H_ */
Index: include/avr/iom48p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom48p.h,v
retrieving revision 1.16
diff -u -r1.16 iom48p.h
--- include/avr/iom48p.h	11 Feb 2009 17:53:37 -0000	1.16
+++ include/avr/iom48p.h	26 Mar 2009 20:10:32 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -781,30 +782,55 @@
 
 /* Interrupt Vectors */
 /* Interrupt Vector 0 is the reset vector. */
+#define INT0_num          1
 #define INT0_vect         _VECTOR(1)   /* External Interrupt Request 0 */
+#define INT1_num          2
 #define INT1_vect         _VECTOR(2)   /* External Interrupt Request 1 */
+#define PCINT0_num        3
 #define PCINT0_vect       _VECTOR(3)   /* Pin Change Interrupt Request 0 */
+#define PCINT1_num        4
 #define PCINT1_vect       _VECTOR(4)   /* Pin Change Interrupt Request 0 */
+#define PCINT2_num        5
 #define PCINT2_vect       _VECTOR(5)   /* Pin Change Interrupt Request 1 */
+#define WDT_num           6
 #define WDT_vect          _VECTOR(6)   /* Watchdog Time-out Interrupt */
+#define TIMER2_COMPA_num  7
 #define TIMER2_COMPA_vect _VECTOR(7)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPB_num  8
 #define TIMER2_COMPB_vect _VECTOR(8)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_OVF_num    9
 #define TIMER2_OVF_vect   _VECTOR(9)   /* Timer/Counter2 Overflow */
+#define TIMER1_CAPT_num   10
 #define TIMER1_CAPT_vect  _VECTOR(10)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num  11
 #define TIMER1_COMPA_vect _VECTOR(11)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num  12
 #define TIMER1_COMPB_vect _VECTOR(12)  /* Timer/Counter1 Compare Match B */ 
+#define TIMER1_OVF_num    13
 #define TIMER1_OVF_vect   _VECTOR(13)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num  14
 #define TIMER0_COMPA_vect _VECTOR(14)  /* TimerCounter0 Compare Match A */
+#define TIMER0_COMPB_num  15
 #define TIMER0_COMPB_vect _VECTOR(15)  /* TimerCounter0 Compare Match B */
+#define TIMER0_OVF_num    16
 #define TIMER0_OVF_vect   _VECTOR(16)  /* Timer/Couner0 Overflow */
+#define SPI_STC_num       17
 #define SPI_STC_vect      _VECTOR(17)  /* SPI Serial Transfer Complete */
+#define USART_RX_num      18
 #define USART_RX_vect     _VECTOR(18)  /* USART Rx Complete */
+#define USART_UDRE_num    19
 #define USART_UDRE_vect   _VECTOR(19)  /* USART, Data Register Empty */
+#define USART_TX_num      20
 #define USART_TX_vect     _VECTOR(20)  /* USART Tx Complete */
+#define ADC_num           21
 #define ADC_vect          _VECTOR(21)  /* ADC Conversion Complete */
+#define EE_READY_num      22
 #define EE_READY_vect     _VECTOR(22)  /* EEPROM Ready */
+#define ANALOG_COMP_num   23
 #define ANALOG_COMP_vect  _VECTOR(23)  /* Analog Comparator */
+#define TWI_num           24
 #define TWI_vect          _VECTOR(24)  /* Two-wire Serial Interface */
+#define SPM_READY_num     25
 #define SPM_READY_vect    _VECTOR(25)  /* Store Program Memory Read */
 
 #define _VECTORS_SIZE (26 * 2)
@@ -865,4 +891,276 @@
 #define SIGNATURE_2 0x0A
 
 
+/* Device Pin Definitions */
+#define DDR_ICP1  	DDRB
+#define PORT_ICP1 	PORTB
+#define PIN_ICP1  	PINB
+#define ICP1_IDX  	0
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT16  	DDRD
+#define PORT_PCINT16 	PORTD
+#define PIN_PCINT16  	PIND
+#define PCINT16_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT17  	DDRD
+#define PORT_PCINT17 	PORTD
+#define PIN_PCINT17  	PIND
+#define PCINT17_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT18  	DDRD
+#define PORT_PCINT18 	PORTD
+#define PIN_PCINT18  	PIND
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRD
+#define PORT_PCINT19 	PORTD
+#define PIN_PCINT19  	PIND
+#define PCINT19_IDX  	3
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	3
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_PCINT20  	DDRD
+#define PORT_PCINT20 	PORTD
+#define PIN_PCINT20  	PIND
+#define PCINT20_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_PCINT21  	DDRD
+#define PORT_PCINT21 	PORTD
+#define PIN_PCINT21  	PIND
+#define PCINT21_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	6
+
+#define DDR_PCINT22  	DDRD
+#define PORT_PCINT22 	PORTD
+#define PIN_PCINT22  	PIND
+#define PCINT22_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+#define DDR_PCINT23  	DDRD
+#define PORT_PCINT23 	PORTD
+#define PIN_PCINT23  	PIND
+#define PCINT23_IDX  	7
+
+
 #endif  /* _AVR_IOM48P_H_ */
Index: include/avr/iomxx0_1.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iomxx0_1.h,v
retrieving revision 1.12
diff -u -r1.12 iomxx0_1.h
--- include/avr/iomxx0_1.h	12 Dec 2007 14:00:49 -0000	1.12
+++ include/avr/iomxx0_1.h	26 Mar 2009 20:10:34 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2005 Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1300,211 +1301,261 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 #define SIG_INTERRUPT3			_VECTOR(4)
 
 /* External Interrupt Request 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 #define SIG_INTERRUPT4			_VECTOR(5)
 
 /* External Interrupt Request 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 #define SIG_INTERRUPT5			_VECTOR(6)
 
 /* External Interrupt Request 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 #define SIG_INTERRUPT6			_VECTOR(7)
 
 /* External Interrupt Request 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 #define SIG_INTERRUPT7			_VECTOR(8)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			9
 #define PCINT0_vect			_VECTOR(9)
 #define SIG_PIN_CHANGE0			_VECTOR(9)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			10
 #define PCINT1_vect			_VECTOR(10)
 #define SIG_PIN_CHANGE1			_VECTOR(10)
 
 #if defined(__ATmegaxx0__)
 /* Pin Change Interrupt Request 2 */
+#define PCINT2_num 			11
 #define PCINT2_vect			_VECTOR(11)
 #define SIG_PIN_CHANGE2			_VECTOR(11)
 
 #endif /* __ATmegaxx0__ */
 
 /* Watchdog Time-out Interrupt */
+#define WDT_num 			12
 #define WDT_vect			_VECTOR(12)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(12)
 
 /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPA_num 		13
 #define TIMER2_COMPA_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE2A		_VECTOR(13)
 
 /* Timer/Counter2 Compare Match B */
+#define TIMER2_COMPB_num 		14
 #define TIMER2_COMPB_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE2B		_VECTOR(14)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			15
 #define TIMER2_OVF_vect			_VECTOR(15)
 #define SIG_OVERFLOW2			_VECTOR(15)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		16
 #define TIMER1_CAPT_vect		_VECTOR(16)
 #define SIG_INPUT_CAPTURE1		_VECTOR(16)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		17
 #define TIMER1_COMPA_vect		_VECTOR(17)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(17)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		18
 #define TIMER1_COMPB_vect		_VECTOR(18)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(18)
 
 /* Timer/Counter1 Compare Match C */
+#define TIMER1_COMPC_num 		19
 #define TIMER1_COMPC_vect		_VECTOR(19)
 #define SIG_OUTPUT_COMPARE1C		_VECTOR(19)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			20
 #define TIMER1_OVF_vect			_VECTOR(20)
 #define SIG_OVERFLOW1			_VECTOR(20)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMPA_num 		21
 #define TIMER0_COMPA_vect		_VECTOR(21)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(21)
 
 /* Timer/Counter0 Compare Match B */
+#define TIMER0_COMPB_num 		22
 #define TIMER0_COMPB_vect		_VECTOR(22)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(22)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			23
 #define TIMER0_OVF_vect			_VECTOR(23)
 #define SIG_OVERFLOW0			_VECTOR(23)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			24
 #define SPI_STC_vect			_VECTOR(24)
 #define SIG_SPI				_VECTOR(24)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			25
 #define USART0_RX_vect			_VECTOR(25)
 #define SIG_USART0_RECV			_VECTOR(25)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		26
 #define USART0_UDRE_vect		_VECTOR(26)
 #define SIG_USART0_DATA			_VECTOR(26)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			27
 #define USART0_TX_vect			_VECTOR(27)
 #define SIG_USART0_TRANS		_VECTOR(27)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		28
 #define ANALOG_COMP_vect		_VECTOR(28)
 #define SIG_COMPARATOR			_VECTOR(28)
 
 /* ADC Conversion Complete */
+#define ADC_num 			29
 #define ADC_vect			_VECTOR(29)
 #define SIG_ADC				_VECTOR(29)
 
 /* EEPROM Ready */
+#define EE_READY_num 			30
 #define EE_READY_vect			_VECTOR(30)
 #define SIG_EEPROM_READY		_VECTOR(30)
 
 /* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_num 		31
 #define TIMER3_CAPT_vect		_VECTOR(31)
 #define SIG_INPUT_CAPTURE3		_VECTOR(31)
 
 /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_num 		32
 #define TIMER3_COMPA_vect		_VECTOR(32)
 #define SIG_OUTPUT_COMPARE3A		_VECTOR(32)
 
 /* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_num 		33
 #define TIMER3_COMPB_vect		_VECTOR(33)
 #define SIG_OUTPUT_COMPARE3B		_VECTOR(33)
 
 /* Timer/Counter3 Compare Match C */
+#define TIMER3_COMPC_num 		34
 #define TIMER3_COMPC_vect		_VECTOR(34)
 #define SIG_OUTPUT_COMPARE3C		_VECTOR(34)
 
 /* Timer/Counter3 Overflow */
+#define TIMER3_OVF_num 			35
 #define TIMER3_OVF_vect			_VECTOR(35)
 #define SIG_OVERFLOW3			_VECTOR(35)
 
 /* USART1, Rx Complete */
+#define USART1_RX_num 			36
 #define USART1_RX_vect			_VECTOR(36)
 #define SIG_USART1_RECV			_VECTOR(36)
 
 /* USART1 Data register Empty */
+#define USART1_UDRE_num 		37
 #define USART1_UDRE_vect		_VECTOR(37)
 #define SIG_USART1_DATA			_VECTOR(37)
 
 /* USART1, Tx Complete */
+#define USART1_TX_num 			38
 #define USART1_TX_vect			_VECTOR(38)
 #define SIG_USART1_TRANS		_VECTOR(38)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			39
 #define TWI_vect			_VECTOR(39)
 #define SIG_2WIRE_SERIAL		_VECTOR(39)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			40
 #define SPM_READY_vect			_VECTOR(40)
 #define SIG_SPM_READY			_VECTOR(40)
 
 #if defined(__ATmegaxx0__)
 /* Timer/Counter4 Capture Event */
+#define TIMER4_CAPT_num 		41
 #define TIMER4_CAPT_vect		_VECTOR(41)
 #define SIG_INPUT_CAPTURE4		_VECTOR(41)
 
 #endif /* __ATmegaxx0__ */
 
 /* Timer/Counter4 Compare Match A */
+#define TIMER4_COMPA_num 		42
 #define TIMER4_COMPA_vect		_VECTOR(42)
 #define SIG_OUTPUT_COMPARE4A		_VECTOR(42)
 
 /* Timer/Counter4 Compare Match B */
+#define TIMER4_COMPB_num 		43
 #define TIMER4_COMPB_vect		_VECTOR(43)
 #define SIG_OUTPUT_COMPARE4B		_VECTOR(43)
 
 /* Timer/Counter4 Compare Match C */
+#define TIMER4_COMPC_num 		44
 #define TIMER4_COMPC_vect		_VECTOR(44)
 #define SIG_OUTPUT_COMPARE4C		_VECTOR(44)
 
 /* Timer/Counter4 Overflow */
+#define TIMER4_OVF_num 			45
 #define TIMER4_OVF_vect			_VECTOR(45)
 #define SIG_OVERFLOW4			_VECTOR(45)
 
 #if defined(__ATmegaxx0__)
 /* Timer/Counter5 Capture Event */
+#define TIMER5_CAPT_num 		46
 #define TIMER5_CAPT_vect		_VECTOR(46)
 #define SIG_INPUT_CAPTURE5		_VECTOR(46)
 
 #endif /* __ATmegaxx0__ */
 
 /* Timer/Counter5 Compare Match A */
+#define TIMER5_COMPA_num 		47
 #define TIMER5_COMPA_vect		_VECTOR(47)
 #define SIG_OUTPUT_COMPARE5A		_VECTOR(47)
 
 /* Timer/Counter5 Compare Match B */
+#define TIMER5_COMPB_num 		48
 #define TIMER5_COMPB_vect		_VECTOR(48)
 #define SIG_OUTPUT_COMPARE5B		_VECTOR(48)
 
 /* Timer/Counter5 Compare Match C */
+#define TIMER5_COMPC_num 		49
 #define TIMER5_COMPC_vect		_VECTOR(49)
 #define SIG_OUTPUT_COMPARE5C		_VECTOR(49)
 
 /* Timer/Counter5 Overflow */
+#define TIMER5_OVF_num 			50
 #define TIMER5_OVF_vect			_VECTOR(50)
 #define SIG_OVERFLOW5			_VECTOR(50)
 
@@ -1515,26 +1566,32 @@
 #else
 
 /* USART2, Rx Complete */
+#define USART2_RX_num 			51
 #define USART2_RX_vect			_VECTOR(51)
 #define SIG_USART2_RECV			_VECTOR(51)
 
 /* USART2 Data register Empty */
+#define USART2_UDRE_num 		52
 #define USART2_UDRE_vect		_VECTOR(52)
 #define SIG_USART2_DATA			_VECTOR(52)
 
 /* USART2, Tx Complete */
+#define USART2_TX_num 			53
 #define USART2_TX_vect			_VECTOR(53)
 #define SIG_USART2_TRANS		_VECTOR(53)
 
 /* USART3, Rx Complete */
+#define USART3_RX_num 			54
 #define USART3_RX_vect			_VECTOR(54)
 #define SIG_USART3_RECV			_VECTOR(54)
 
 /* USART3 Data register Empty */
+#define USART3_UDRE_num 		55
 #define USART3_UDRE_vect		_VECTOR(55)
 #define SIG_USART3_DATA			_VECTOR(55)
 
 /* USART3, Tx Complete */
+#define USART3_TX_num 			56
 #define USART3_TX_vect			_VECTOR(56)
 #define SIG_USART3_TRANS		_VECTOR(56)
 
@@ -1550,4 +1607,571 @@
 # undef __ATmegaxx1__
 #endif
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	7
+
+#define DDR_OC1C  	DDRB
+#define PORT_OC1C 	PORTB
+#define PIN_OC1C  	PINB
+#define OC1C_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_SCL  	DDRD
+#define PORT_SCL 	PORTD
+#define PIN_SCL  	PIND
+#define SCL_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	0
+
+#define DDR_SDA  	DDRD
+#define PORT_SDA 	PORTD
+#define PIN_SDA  	PIND
+#define SDA_IDX  	1
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	1
+
+#define DDR_RXD1  	DDRD
+#define PORT_RXD1 	PORTD
+#define PIN_RXD1  	PIND
+#define RXD1_IDX  	2
+
+#define DDR_INT2  	DDRD
+#define PORT_INT2 	PORTD
+#define PIN_INT2  	PIND
+#define INT2_IDX  	2
+
+#define DDR_TXD1  	DDRD
+#define PORT_TXD1 	PORTD
+#define PIN_TXD1  	PIND
+#define TXD1_IDX  	3
+
+#define DDR_INT3  	DDRD
+#define PORT_INT3 	PORTD
+#define PIN_INT3  	PIND
+#define INT3_IDX  	3
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	4
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	5
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	6
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT8  	DDRE
+#define PORT_PCINT8 	PORTE
+#define PIN_PCINT8  	PINE
+#define PCINT8_IDX  	0
+
+#define DDR_TXD0  	DDRE
+#define PORT_TXD0 	PORTE
+#define PIN_TXD0  	PINE
+#define TXD0_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_OC3A  	DDRE
+#define PORT_OC3A 	PORTE
+#define PIN_OC3A  	PINE
+#define OC3A_IDX  	3
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_OC3B  	DDRE
+#define PORT_OC3B 	PORTE
+#define PIN_OC3B  	PINE
+#define OC3B_IDX  	4
+
+#define DDR_INT4  	DDRE
+#define PORT_INT4 	PORTE
+#define PIN_INT4  	PINE
+#define INT4_IDX  	4
+
+#define DDR_OC3C  	DDRE
+#define PORT_OC3C 	PORTE
+#define PIN_OC3C  	PINE
+#define OC3C_IDX  	5
+
+#define DDR_INT5  	DDRE
+#define PORT_INT5 	PORTE
+#define PIN_INT5  	PINE
+#define INT5_IDX  	5
+
+#define DDR_T3  	DDRE
+#define PORT_T3 	PORTE
+#define PIN_T3  	PINE
+#define T3_IDX  	6
+
+#define DDR_INT6  	DDRE
+#define PORT_INT6 	PORTE
+#define PIN_INT6  	PINE
+#define INT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_ICP3  	DDRE
+#define PORT_ICP3 	PORTE
+#define PIN_ICP3  	PINE
+#define ICP3_IDX  	7
+
+#define DDR_INT7  	DDRE
+#define PORT_INT7 	PORTE
+#define PIN_INT7  	PINE
+#define INT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_WR  	DDRG
+#define PORT_WR 	PORTG
+#define PIN_WR  	PING
+#define WR_IDX  	0
+
+#define DDR_RD  	DDRG
+#define PORT_RD 	PORTG
+#define PIN_RD  	PING
+#define RD_IDX  	1
+
+#define DDR_ALE  	DDRG
+#define PORT_ALE 	PORTG
+#define PIN_ALE  	PING
+#define ALE_IDX  	2
+
+#define DDR_OC0B  	DDRG
+#define PORT_OC0B 	PORTG
+#define PIN_OC0B  	PING
+#define OC0B_IDX  	5
+
+#define DDR_RXD2  	DDRH
+#define PORT_RXD2 	PORTH
+#define PIN_RXD2  	PINH
+#define RXD2_IDX  	0
+
+#define DDR_TXD2  	DDRH
+#define PORT_TXD2 	PORTH
+#define PIN_TXD2  	PINH
+#define TXD2_IDX  	1
+
+#define DDR_XCK2  	DDRH
+#define PORT_XCK2 	PORTH
+#define PIN_XCK2  	PINH
+#define XCK2_IDX  	2
+
+#define DDR_OC4A  	DDRH
+#define PORT_OC4A 	PORTH
+#define PIN_OC4A  	PINH
+#define OC4A_IDX  	3
+
+#define DDR_OC4B  	DDRH
+#define PORT_OC4B 	PORTH
+#define PIN_OC4B  	PINH
+#define OC4B_IDX  	4
+
+#define DDR_OC4C  	DDRH
+#define PORT_OC4C 	PORTH
+#define PIN_OC4C  	PINH
+#define OC4C_IDX  	5
+
+#define DDR_OC2B  	DDRH
+#define PORT_OC2B 	PORTH
+#define PIN_OC2B  	PINH
+#define OC2B_IDX  	6
+
+#define DDR_T4  	DDRH
+#define PORT_T4 	PORTH
+#define PIN_T4  	PINH
+#define T4_IDX  	7
+
+#define DDR_RXD3  	DDRJ
+#define PORT_RXD3 	PORTJ
+#define PIN_RXD3  	PINJ
+#define RXD3_IDX  	0
+
+#define DDR_PCINT9  	DDRJ
+#define PORT_PCINT9 	PORTJ
+#define PIN_PCINT9  	PINJ
+#define PCINT9_IDX  	0
+
+#define DDR_TXD3  	DDRJ
+#define PORT_TXD3 	PORTJ
+#define PIN_TXD3  	PINJ
+#define TXD3_IDX  	1
+
+#define DDR_PCINT10  	DDRJ
+#define PORT_PCINT10 	PORTJ
+#define PIN_PCINT10  	PINJ
+#define PCINT10_IDX  	1
+
+#define DDR_XCK3  	DDRJ
+#define PORT_XCK3 	PORTJ
+#define PIN_XCK3  	PINJ
+#define XCK3_IDX  	2
+
+#define DDR_PCINT11  	DDRJ
+#define PORT_PCINT11 	PORTJ
+#define PIN_PCINT11  	PINJ
+#define PCINT11_IDX  	2
+
+#define DDR_PCINT12  	DDRJ
+#define PORT_PCINT12 	PORTJ
+#define PIN_PCINT12  	PINJ
+#define PCINT12_IDX  	3
+
+#define DDR_PCINT13  	DDRJ
+#define PORT_PCINT13 	PORTJ
+#define PIN_PCINT13  	PINJ
+#define PCINT13_IDX  	4
+
+#define DDR_PCINT14  	DDRJ
+#define PORT_PCINT14 	PORTJ
+#define PIN_PCINT14  	PINJ
+#define PCINT14_IDX  	5
+
+#define DDR_PCINT15  	DDRJ
+#define PORT_PCINT15 	PORTJ
+#define PIN_PCINT15  	PINJ
+#define PCINT15_IDX  	6
+
+#define DDR_ADC8  	DDRK
+#define PORT_ADC8 	PORTK
+#define PIN_ADC8  	PINK
+#define ADC8_IDX  	0
+
+#define DDR_PCINT16  	DDRK
+#define PORT_PCINT16 	PORTK
+#define PIN_PCINT16  	PINK
+#define PCINT16_IDX  	0
+
+#define DDR_ADC9  	DDRK
+#define PORT_ADC9 	PORTK
+#define PIN_ADC9  	PINK
+#define ADC9_IDX  	1
+
+#define DDR_PCINT17  	DDRK
+#define PORT_PCINT17 	PORTK
+#define PIN_PCINT17  	PINK
+#define PCINT17_IDX  	1
+
+#define DDR_ADC10  	DDRK
+#define PORT_ADC10 	PORTK
+#define PIN_ADC10  	PINK
+#define ADC10_IDX  	2
+
+#define DDR_PCINT18  	DDRK
+#define PORT_PCINT18 	PORTK
+#define PIN_PCINT18  	PINK
+#define PCINT18_IDX  	2
+
+#define DDR_ADC11  	DDRK
+#define PORT_ADC11 	PORTK
+#define PIN_ADC11  	PINK
+#define ADC11_IDX  	3
+
+#define DDR_PCINT19  	DDRK
+#define PORT_PCINT19 	PORTK
+#define PIN_PCINT19  	PINK
+#define PCINT19_IDX  	3
+
+#define DDR_ADC12  	DDRK
+#define PORT_ADC12 	PORTK
+#define PIN_ADC12  	PINK
+#define ADC12_IDX  	4
+
+#define DDR_PCINT20  	DDRK
+#define PORT_PCINT20 	PORTK
+#define PIN_PCINT20  	PINK
+#define PCINT20_IDX  	4
+
+#define DDR_ADC13  	DDRK
+#define PORT_ADC13 	PORTK
+#define PIN_ADC13  	PINK
+#define ADC13_IDX  	5
+
+#define DDR_PCINT21  	DDRK
+#define PORT_PCINT21 	PORTK
+#define PIN_PCINT21  	PINK
+#define PCINT21_IDX  	5
+
+#define DDR_ADC14  	DDRK
+#define PORT_ADC14 	PORTK
+#define PIN_ADC14  	PINK
+#define ADC14_IDX  	6
+
+#define DDR_PCINT22  	DDRK
+#define PORT_PCINT22 	PORTK
+#define PIN_PCINT22  	PINK
+#define PCINT22_IDX  	6
+
+#define DDR_ADC15  	DDRK
+#define PORT_ADC15 	PORTK
+#define PIN_ADC15  	PINK
+#define ADC15_IDX  	7
+
+#define DDR_PCINT23  	DDRK
+#define PORT_PCINT23 	PORTK
+#define PIN_PCINT23  	PINK
+#define PCINT23_IDX  	7
+
+#define DDR_ICP4  	DDRL
+#define PORT_ICP4 	PORTL
+#define PIN_ICP4  	PINL
+#define ICP4_IDX  	0
+
+#define DDR_ICP5  	DDRL
+#define PORT_ICP5 	PORTL
+#define PIN_ICP5  	PINL
+#define ICP5_IDX  	1
+
+#define DDR_T5  	DDRL
+#define PORT_T5 	PORTL
+#define PIN_T5  	PINL
+#define T5_IDX  	2
+
+#define DDR_OC5A  	DDRL
+#define PORT_OC5A 	PORTL
+#define PIN_OC5A  	PINL
+#define OC5A_IDX  	3
+
+#define DDR_OC5B  	DDRL
+#define PORT_OC5B 	PORTL
+#define PIN_OC5B  	PINL
+#define OC5B_IDX  	4
+
+#define DDR_OC5C  	DDRL
+#define PORT_OC5C 	PORTL
+#define PIN_OC5C  	PINL
+#define OC5C_IDX  	5
+
+
 #endif /* _AVR_IOMXX0_1_H_ */
Index: include/avr/io86r401.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io86r401.h,v
retrieving revision 1.9
diff -u -r1.9 io86r401.h
--- include/avr/io86r401.h	11 Feb 2009 17:53:34 -0000	1.9
+++ include/avr/io86r401.h	26 Mar 2009 20:10:21 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Colin O'Flynn
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -117,10 +118,12 @@
 /* Interrupt vectors */
 
 /* Transmission Done, Bit Timer Flag 2 Interrupt */
+#define TXDONE_num 			1
 #define TXDONE_vect			_VECTOR(1)
 #define SIG_TXDONE			_VECTOR(1)
 
 /* Transmit Buffer Empty, Bit Itmer Flag 0 Interrupt */
+#define TXEMPTY_num 			2
 #define TXEMPTY_vect			_VECTOR(2)
 #define SIG_TXBE			_VECTOR(2)
 
@@ -305,4 +308,6 @@
 #define SIGNATURE_2 0x81
 
 
+/* Device Pin Definitions */
+
 #endif  /* _AVR_IO86RF401_H_ */
Index: include/avr/io4414.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io4414.h,v
retrieving revision 1.11
diff -u -r1.11 io4414.h
--- include/avr/io4414.h	13 Aug 2008 23:29:49 -0000	1.11
+++ include/avr/io4414.h	26 Mar 2009 20:10:20 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -176,50 +177,62 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter Capture Event */
+#define TIMER1_CAPT_num 		3
 #define TIMER1_CAPT_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		4
 #define TIMER1_COMPA_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 
 /* Timer/Counter1 Compare MatchB */
+#define TIMER1_COMPB_num 		5
 #define TIMER1_COMPB_vect		_VECTOR(5)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(5)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			6
 #define TIMER1_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW1			_VECTOR(6)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			7
 #define TIMER0_OVF_vect			_VECTOR(7)
 #define SIG_OVERFLOW0			_VECTOR(7)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			8
 #define SPI_STC_vect			_VECTOR(8)
 #define SIG_SPI				_VECTOR(8)
 
 /* UART, Rx Complete */
+#define UART_RX_num 			9
 #define UART_RX_vect			_VECTOR(9)
 #define SIG_UART_RECV			_VECTOR(9)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			10
 #define UART_UDRE_vect			_VECTOR(10)
 #define SIG_UART_DATA			_VECTOR(10)
 
 /* UART, Tx Complete */
+#define UART_TX_num 			11
 #define UART_TX_vect			_VECTOR(11)
 #define SIG_UART_TRANS			_VECTOR(11)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			12
 #define ANA_COMP_vect			_VECTOR(12)
 #define SIG_COMPARATOR			_VECTOR(12)
 
@@ -482,4 +495,161 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_WR  	DDRD
+#define PORT_WR 	PORTD
+#define PIN_WR  	PIND
+#define WR_IDX  	6
+
+#define DDR_RD  	DDRD
+#define PORT_RD 	PORTD
+#define PIN_RD  	PIND
+#define RD_IDX  	7
+
+
 #endif /* _AVR_IO4414_H_ */
Index: include/avr/io90pwm2b.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io90pwm2b.h,v
retrieving revision 1.15
diff -u -r1.15 io90pwm2b.h
--- include/avr/io90pwm2b.h	11 Feb 2009 17:53:34 -0000	1.15
+++ include/avr/io90pwm2b.h	26 Mar 2009 20:10:22 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1291,36 +1292,64 @@
 
 /* Interrupt Vectors */
 /* Interrupt vector 0 is the reset vector. */
+#define PSC2_CAPT_num       1
 #define PSC2_CAPT_vect      _VECTOR(1)   /* PSC2 Capture Event */
+#define PSC2_EC_num         2
 #define PSC2_EC_vect        _VECTOR(2)   /* PSC2 End Cycle */
+#define PSC1_CAPT_num       3
 #define PSC1_CAPT_vect      _VECTOR(3)   /* PSC1 Capture Event */
+#define PSC1_EC_num         4
 #define PSC1_EC_vect        _VECTOR(4)   /* PSC1 End Cycle */
+#define PSC0_CAPT_num       5
 #define PSC0_CAPT_vect      _VECTOR(5)   /* PSC0 Capture Event */
+#define PSC0_EC_num         6
 #define PSC0_EC_vect        _VECTOR(6)   /* PSC0 End Cycle */
+#define ANALOG_COMP_0_num   7
 #define ANALOG_COMP_0_vect  _VECTOR(7)   /* Analog Comparator 0 */
+#define ANALOG_COMP_1_num   8
 #define ANALOG_COMP_1_vect  _VECTOR(8)   /* Analog Comparator 1 */
+#define ANALOG_COMP_2_num   9
 #define ANALOG_COMP_2_vect  _VECTOR(9)   /* Analog Comparator 2 */
+#define INT0_num            10
 #define INT0_vect           _VECTOR(10)  /* External Interrupt Request 0 */
+#define TIMER1_CAPT_num     11
 #define TIMER1_CAPT_vect    _VECTOR(11)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num    12
 #define TIMER1_COMPA_vect   _VECTOR(12)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num    13
 #define TIMER1_COMPB_vect   _VECTOR(13)  /* Timer/Counter Compare Match B */
 /* Vector 14, Reserved */
+#define TIMER1_OVF_num      15
 #define TIMER1_OVF_vect     _VECTOR(15)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num    16
 #define TIMER0_COMPA_vect   _VECTOR(16)  /* Timer/Counter0 Compare Match A */
+#define TIMER0_OVF_num      17
 #define TIMER0_OVF_vect     _VECTOR(17)  /* Timer/Counter0 Overflow */
+#define ADC_num             18
 #define ADC_vect            _VECTOR(18)  /* ADC Conversion Complete */
+#define INT1_num            19
 #define INT1_vect           _VECTOR(19)  /* External Interrupt Request 1 */
+#define SPI_STC_num         20
 #define SPI_STC_vect        _VECTOR(20)  /* SPI Serial Transfer Complete */
+#define USART_RX_num        21
 #define USART_RX_vect       _VECTOR(21)  /* USART, Rx Complete */
+#define USART_UDRE_num      22
 #define USART_UDRE_vect     _VECTOR(22)  /* USART Data Register Empty */
+#define USART_TX_num        23
 #define USART_TX_vect       _VECTOR(23)  /* USART, Tx Complete */
+#define INT2_num            24
 #define INT2_vect           _VECTOR(24)  /* External Interrupt Request 2 */
+#define WDT_num             25
 #define WDT_vect            _VECTOR(25)  /* Watchdog Timeout Interrupt */
+#define EE_READY_num        26
 #define EE_READY_vect       _VECTOR(26)  /* EEPROM Ready */
+#define TIMER0_COMPB_num    27
 #define TIMER0_COMPB_vect   _VECTOR(27)  /* Timer Counter 0 Compare Match B */
+#define INT3_num            28
 #define INT3_vect           _VECTOR(28)  /* External Interrupt Request 3 */
 /* Vector 29, Reserved */
 /* Vector 30, Reserved */
+#define SPM_READY_num       31
 #define SPM_READY_vect      _VECTOR(31)  /* Store Program Memory Read */
 
 #define _VECTORS_SIZE 64
@@ -1389,4 +1418,221 @@
 #define SIGNATURE_2 0x83
 
 
+/* Device Pin Definitions */
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	0
+
+#define DDR_PSCOUT20  	DDRB
+#define PORT_PSCOUT20 	PORTB
+#define PIN_PSCOUT20  	PINB
+#define PSCOUT20_IDX  	0
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	1
+
+#define DDR_PSCOUT21  	DDRB
+#define PORT_PSCOUT21 	PORTB
+#define PIN_PSCOUT21  	PINB
+#define PSCOUT21_IDX  	1
+
+#define DDR_ADC5  	DDRB
+#define PORT_ADC5 	PORTB
+#define PIN_ADC5  	PINB
+#define ADC5_IDX  	2
+
+#define DDR_INT1  	DDRB
+#define PORT_INT1 	PORTB
+#define PIN_INT1  	PINB
+#define INT1_IDX  	2
+
+#define DDR_AMP0_N  	DDRB
+#define PORT_AMP0_N 	PORTB
+#define PIN_AMP0_N  	PINB
+#define AMP0_N_IDX  	3
+
+#define DDR_AMP0_P  	DDRB
+#define PORT_AMP0_P 	PORTB
+#define PIN_AMP0_P  	PINB
+#define AMP0_P_IDX  	4
+
+#define DDR_ADC6  	DDRB
+#define PORT_ADC6 	PORTB
+#define PIN_ADC6  	PINB
+#define ADC6_IDX  	5
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	5
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	6
+
+#define DDR_PSCOUT11  	DDRB
+#define PORT_PSCOUT11 	PORTB
+#define PIN_PSCOUT11  	PINB
+#define PSCOUT11_IDX  	6
+
+#define DDR_ICP1B  	DDRB
+#define PORT_ICP1B 	PORTB
+#define PIN_ICP1B  	PINB
+#define ICP1B_IDX  	6
+
+#define DDR_ADC4  	DDRB
+#define PORT_ADC4 	PORTB
+#define PIN_ADC4  	PINB
+#define ADC4_IDX  	7
+
+#define DDR_PSCOUT01  	DDRB
+#define PORT_PSCOUT01 	PORTB
+#define PIN_PSCOUT01  	PINB
+#define PSCOUT01_IDX  	7
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_PSCOUT00  	DDRD
+#define PORT_PSCOUT00 	PORTD
+#define PIN_PSCOUT00  	PIND
+#define PSCOUT00_IDX  	0
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	0
+
+#define DDR_SSA  	DDRD
+#define PORT_SSA 	PORTD
+#define PIN_SSA  	PIND
+#define SSA_IDX  	0
+
+#define DDR_PSCIN0  	DDRD
+#define PORT_PSCIN0 	PORTD
+#define PIN_PSCIN0  	PIND
+#define PSCIN0_IDX  	1
+
+#define DDR_CLKO  	DDRD
+#define PORT_CLKO 	PORTD
+#define PIN_CLKO  	PIND
+#define CLKO_IDX  	1
+
+#define DDR_PSCIN2  	DDRD
+#define PORT_PSCIN2 	PORTD
+#define PIN_PSCIN2  	PIND
+#define PSCIN2_IDX  	2
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	2
+
+#define DDR_MISO_A  	DDRD
+#define PORT_MISO_A 	PORTD
+#define PIN_MISO_A  	PIND
+#define MISO_A_IDX  	2
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	3
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	3
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	3
+
+#define DDR_SS  	DDRD
+#define PORT_SS 	PORTD
+#define PIN_SS  	PIND
+#define SS_IDX  	3
+
+#define DDR_MOSI_A  	DDRD
+#define PORT_MOSI_A 	PORTD
+#define PIN_MOSI_A  	PIND
+#define MOSI_A_IDX  	3
+
+#define DDR_ADC1  	DDRD
+#define PORT_ADC1 	PORTD
+#define PIN_ADC1  	PIND
+#define ADC1_IDX  	4
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	4
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	4
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	4
+
+#define DDR_SCK_A  	DDRD
+#define PORT_SCK_A 	PORTD
+#define PIN_SCK_A  	PIND
+#define SCK_A_IDX  	4
+
+#define DDR_ADC2  	DDRD
+#define PORT_ADC2 	PORTD
+#define PIN_ADC2  	PIND
+#define ADC2_IDX  	5
+
+#define DDR_ACMP2  	DDRD
+#define PORT_ACMP2 	PORTD
+#define PIN_ACMP2  	PIND
+#define ACMP2_IDX  	5
+
+#define DDR_ADC3  	DDRD
+#define PORT_ADC3 	PORTD
+#define PIN_ADC3  	PIND
+#define ADC3_IDX  	6
+
+#define DDR_ACMPM  	DDRD
+#define PORT_ACMPM 	PORTD
+#define PIN_ACMPM  	PIND
+#define ACMPM_IDX  	6
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	6
+
+#define DDR_ACMP0  	DDRD
+#define PORT_ACMP0 	PORTD
+#define PIN_ACMP0  	PIND
+#define ACMP0_IDX  	7
+
+#define DDR_OCD  	DDRE
+#define PORT_OCD 	PORTE
+#define PIN_OCD  	PINE
+#define OCD_IDX  	0
+
+#define DDR_OC0B  	DDRE
+#define PORT_OC0B 	PORTE
+#define PIN_OC0B  	PINE
+#define OC0B_IDX  	1
+
+#define DDR_ADC0  	DDRE
+#define PORT_ADC0 	PORTE
+#define PIN_ADC0  	PINE
+#define ADC0_IDX  	2
+
+
 #endif /* _AVR_IO90PWM2B_H_ */
Index: include/avr/iom323.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom323.h,v
retrieving revision 1.19
diff -u -r1.19 iom323.h
--- include/avr/iom323.h	11 Feb 2009 17:53:36 -0000	1.19
+++ include/avr/iom323.h	26 Mar 2009 20:10:28 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -171,82 +172,102 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART, Rx Complete */
+#define USART_RXC_num 			13
 #define USART_RXC_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			14
 #define USART_UDRE_vect			_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART, Tx Complete */
+#define USART_TXC_num 			15
 #define USART_TXC_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* ADC Conversion Complete */
+#define ADC_num 			16
 #define ADC_vect			_VECTOR(16)
 #define SIG_ADC				_VECTOR(16)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			17
 #define EE_RDY_vect			_VECTOR(17)
 #define SIG_EEPROM_READY		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			18
 #define ANA_COMP_vect			_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			19
 #define TWI_vect			_VECTOR(19)
 #define SIG_2WIRE_SERIAL		_VECTOR(19)
 
 /* Store Program Memory Ready */
+#define SPM_RDY_num 			20
 #define SPM_RDY_vect			_VECTOR(20)
 
 #define _VECTORS_SIZE 80
@@ -685,4 +706,146 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_XCK  	DDRB
+#define PORT_XCK 	PORTB
+#define PIN_XCK  	PINB
+#define XCK_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IOM323_H_ */
Index: include/avr/iotn26.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn26.h,v
retrieving revision 1.22
diff -u -r1.22 iotn26.h
--- include/avr/iotn26.h	11 Feb 2009 17:53:38 -0000	1.22
+++ include/avr/iotn26.h	26 Mar 2009 20:10:36 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004,2005 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -293,47 +294,58 @@
 /* Interrupt vectors */
 /* Interrupt vector 0 is the reset vector. */
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 0 */
+#define IO_PINS_num 			2
 #define IO_PINS_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE			_VECTOR(2)
 
 /* Timer/Counter1 Compare Match 1A */
+#define TIMER1_CMPA_num 		3
 #define TIMER1_CMPA_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match 1B */
+#define TIMER1_CMPB_num 		4
 #define TIMER1_CMPB_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(4)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF1_num 		5
 #define TIMER1_OVF1_vect		_VECTOR(5)
 #define SIG_OVERFLOW1			_VECTOR(5)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF0_num 		6
 #define TIMER0_OVF0_vect		_VECTOR(6)
 #define SIG_OVERFLOW0			_VECTOR(6)
 
 /* USI Start */
+#define USI_STRT_num 			7
 #define USI_STRT_vect			_VECTOR(7)
 #define SIG_USI_START			_VECTOR(7)
 
 /* USI Overflow */
+#define USI_OVF_num 			8
 #define USI_OVF_vect			_VECTOR(8)
 #define SIG_USI_OVERFLOW		_VECTOR(8)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			9
 #define EE_RDY_vect			_VECTOR(9)
 #define SIG_EEPROM_READY		_VECTOR(9)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			10
 #define ANA_COMP_vect			_VECTOR(10)
 #define SIG_ANA_COMP			_VECTOR(10)
 #define SIG_COMPARATOR			_VECTOR(10)
 
 /* ADC Conversion Complete */
+#define ADC_num 			11
 #define ADC_vect			_VECTOR(11)
 #define SIG_ADC				_VECTOR(11)
 
@@ -382,4 +394,176 @@
 #define SIGNATURE_2 0x09
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	4
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	5
+
+#define DDR_ADC5  	DDRA
+#define PORT_ADC5 	PORTA
+#define PIN_ADC5  	PINA
+#define ADC5_IDX  	6
+
+#define DDR_AIN0  	DDRA
+#define PORT_AIN0 	PORTA
+#define PIN_AIN0  	PINA
+#define AIN0_IDX  	6
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	7
+
+#define DDR_AIN1  	DDRA
+#define PORT_AIN1 	PORTA
+#define PIN_AIN1  	PINA
+#define AIN1_IDX  	7
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_DI  	DDRB
+#define PORT_DI 	PORTB
+#define PIN_DI  	PINB
+#define DI_IDX  	0
+
+#define DDR_SDA  	DDRB
+#define PORT_SDA 	PORTB
+#define PIN_SDA  	PINB
+#define SDA_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_DO  	DDRB
+#define PORT_DO 	PORTB
+#define PIN_DO  	PINB
+#define DO_IDX  	1
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_SCL  	DDRB
+#define PORT_SCL 	PORTB
+#define PIN_SCL  	PINB
+#define SCL_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	3
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	3
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	4
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	4
+
+#define DDR_ADC8  	DDRB
+#define PORT_ADC8 	PORTB
+#define PIN_ADC8  	PINB
+#define ADC8_IDX  	5
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	5
+
+#define DDR_ADC9  	DDRB
+#define PORT_ADC9 	PORTB
+#define PIN_ADC9  	PINB
+#define ADC9_IDX  	6
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	6
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	6
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	6
+
+#define DDR_ADC10  	DDRB
+#define PORT_ADC10 	PORTB
+#define PIN_ADC10  	PINB
+#define ADC10_IDX  	7
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	7
+
+
 #endif  /* _AVR_IOTN26_H_ */
Index: include/avr/io90pwm216.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io90pwm216.h,v
retrieving revision 1.14
diff -u -r1.14 io90pwm216.h
--- include/avr/io90pwm216.h	11 Feb 2009 17:53:34 -0000	1.14
+++ include/avr/io90pwm216.h	26 Mar 2009 20:10:22 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007, Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1033,87 +1034,115 @@
 /* Interrupt 0 is the reset vector. */
 
 /* PSC2 Capture Event */
+#define PSC2_CAPT_num      1
 #define PSC2_CAPT_vect     _VECTOR(1)
 
 /* PSC2 End Cycle */
+#define PSC2_EC_num        2
 #define PSC2_EC_vect       _VECTOR(2)
 
 /* PSC1 Capture Event */
+#define PSC1_CAPT_num      3
 #define PSC1_CAPT_vect     _VECTOR(3)
 
 /* PSC1 End Cycle */
+#define PSC1_EC_num        4
 #define PSC1_EC_vect       _VECTOR(4)
 
 /* PSC0 Capture Event */
+#define PSC0_CAPT_num      5
 #define PSC0_CAPT_vect     _VECTOR(5)
 
 /* PSC0 End Cycle */
+#define PSC0_EC_num        6
 #define PSC0_EC_vect       _VECTOR(6)
 
 /* Analog Comparator 0 */
+#define ANALOG_COMP_0_num  7
 #define ANALOG_COMP_0_vect _VECTOR(7)
 
 /* Analog Comparator 1 */
+#define ANALOG_COMP_1_num  8
 #define ANALOG_COMP_1_vect _VECTOR(8)
 
 /* Analog Comparator 2 */
+#define ANALOG_COMP_2_num  9
 #define ANALOG_COMP_2_vect _VECTOR(9)
 
 /* External Interrupt Request 0 */
+#define INT0_num           10
 #define INT0_vect          _VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num    11
 #define TIMER1_CAPT_vect   _VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num   12
 #define TIMER1_COMPA_vect  _VECTOR(12)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num   13
 #define TIMER1_COMPB_vect  _VECTOR(13)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num     15
 #define TIMER1_OVF_vect    _VECTOR(15)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMP_A_num  16
 #define TIMER0_COMP_A_vect _VECTOR(16)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num     17
 #define TIMER0_OVF_vect    _VECTOR(17)
 
 /* ADC Conversion Complete */
+#define ADC_num            18
 #define ADC_vect           _VECTOR(18)
 
 /* External Interrupt Request 1 */
+#define INT1_num           19
 #define INT1_vect          _VECTOR(19)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num        20
 #define SPI_STC_vect       _VECTOR(20)
 
 /* USART, Rx Complete */
+#define USART_RX_num       21
 #define USART_RX_vect      _VECTOR(21)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num     22
 #define USART_UDRE_vect    _VECTOR(22)
 
 /* USART, Tx Complete */
+#define USART_TX_num       23
 #define USART_TX_vect      _VECTOR(23)
 
 /* External Interrupt Request 2 */
+#define INT2_num           24
 #define INT2_vect          _VECTOR(24)
 
 /* Watchdog Timeout Interrupt */
+#define WDT_num            25
 #define WDT_vect           _VECTOR(25)
 
 /* EEPROM Ready */
+#define EE_READY_num       26
 #define EE_READY_vect      _VECTOR(26)
 
 /* Timer Counter 0 Compare Match B */
+#define TIMER0_COMPB_num   27
 #define TIMER0_COMPB_vect  _VECTOR(27)
 
 /* External Interrupt Request 3 */
+#define INT3_num           28
 #define INT3_vect          _VECTOR(28)
 
 /* Store Program Memory Read */
+#define SPM_READY_num      31
 #define SPM_READY_vect     _VECTOR(31)
 
 #define _VECTORS_SIZE   (4 * 32)
@@ -1178,4 +1207,221 @@
 #define SIGNATURE_2 0x83
 
 
+/* Device Pin Definitions */
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	0
+
+#define DDR_PSCOUT20  	DDRB
+#define PORT_PSCOUT20 	PORTB
+#define PIN_PSCOUT20  	PINB
+#define PSCOUT20_IDX  	0
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	1
+
+#define DDR_PSCOUT21  	DDRB
+#define PORT_PSCOUT21 	PORTB
+#define PIN_PSCOUT21  	PINB
+#define PSCOUT21_IDX  	1
+
+#define DDR_ADC5  	DDRB
+#define PORT_ADC5 	PORTB
+#define PIN_ADC5  	PINB
+#define ADC5_IDX  	2
+
+#define DDR_INT1  	DDRB
+#define PORT_INT1 	PORTB
+#define PIN_INT1  	PINB
+#define INT1_IDX  	2
+
+#define DDR_AMP0_N  	DDRB
+#define PORT_AMP0_N 	PORTB
+#define PIN_AMP0_N  	PINB
+#define AMP0_N_IDX  	3
+
+#define DDR_AMP0_P  	DDRB
+#define PORT_AMP0_P 	PORTB
+#define PIN_AMP0_P  	PINB
+#define AMP0_P_IDX  	4
+
+#define DDR_ADC6  	DDRB
+#define PORT_ADC6 	PORTB
+#define PIN_ADC6  	PINB
+#define ADC6_IDX  	5
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	5
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	6
+
+#define DDR_PSCOUT11  	DDRB
+#define PORT_PSCOUT11 	PORTB
+#define PIN_PSCOUT11  	PINB
+#define PSCOUT11_IDX  	6
+
+#define DDR_ICP1B  	DDRB
+#define PORT_ICP1B 	PORTB
+#define PIN_ICP1B  	PINB
+#define ICP1B_IDX  	6
+
+#define DDR_ADC4  	DDRB
+#define PORT_ADC4 	PORTB
+#define PIN_ADC4  	PINB
+#define ADC4_IDX  	7
+
+#define DDR_PSCOUT01  	DDRB
+#define PORT_PSCOUT01 	PORTB
+#define PIN_PSCOUT01  	PINB
+#define PSCOUT01_IDX  	7
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_PSCOUT00  	DDRD
+#define PORT_PSCOUT00 	PORTD
+#define PIN_PSCOUT00  	PIND
+#define PSCOUT00_IDX  	0
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	0
+
+#define DDR_SSA  	DDRD
+#define PORT_SSA 	PORTD
+#define PIN_SSA  	PIND
+#define SSA_IDX  	0
+
+#define DDR_PSCIN0  	DDRD
+#define PORT_PSCIN0 	PORTD
+#define PIN_PSCIN0  	PIND
+#define PSCIN0_IDX  	1
+
+#define DDR_CLKO  	DDRD
+#define PORT_CLKO 	PORTD
+#define PIN_CLKO  	PIND
+#define CLKO_IDX  	1
+
+#define DDR_PSCIN2  	DDRD
+#define PORT_PSCIN2 	PORTD
+#define PIN_PSCIN2  	PIND
+#define PSCIN2_IDX  	2
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	2
+
+#define DDR_MISO_A  	DDRD
+#define PORT_MISO_A 	PORTD
+#define PIN_MISO_A  	PIND
+#define MISO_A_IDX  	2
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	3
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	3
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	3
+
+#define DDR_SS  	DDRD
+#define PORT_SS 	PORTD
+#define PIN_SS  	PIND
+#define SS_IDX  	3
+
+#define DDR_MOSI_A  	DDRD
+#define PORT_MOSI_A 	PORTD
+#define PIN_MOSI_A  	PIND
+#define MOSI_A_IDX  	3
+
+#define DDR_ADC1  	DDRD
+#define PORT_ADC1 	PORTD
+#define PIN_ADC1  	PIND
+#define ADC1_IDX  	4
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	4
+
+#define DDR_DALI  	DDRD
+#define PORT_DALI 	PORTD
+#define PIN_DALI  	PIND
+#define DALI_IDX  	4
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	4
+
+#define DDR_SCK_A  	DDRD
+#define PORT_SCK_A 	PORTD
+#define PIN_SCK_A  	PIND
+#define SCK_A_IDX  	4
+
+#define DDR_ADC2  	DDRD
+#define PORT_ADC2 	PORTD
+#define PIN_ADC2  	PIND
+#define ADC2_IDX  	5
+
+#define DDR_ACMP2  	DDRD
+#define PORT_ACMP2 	PORTD
+#define PIN_ACMP2  	PIND
+#define ACMP2_IDX  	5
+
+#define DDR_ADC3  	DDRD
+#define PORT_ADC3 	PORTD
+#define PIN_ADC3  	PIND
+#define ADC3_IDX  	6
+
+#define DDR_ACMPM  	DDRD
+#define PORT_ACMPM 	PORTD
+#define PIN_ACMPM  	PIND
+#define ACMPM_IDX  	6
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	6
+
+#define DDR_ACMP0  	DDRD
+#define PORT_ACMP0 	PORTD
+#define PIN_ACMP0  	PIND
+#define ACMP0_IDX  	7
+
+#define DDR_OCD  	DDRE
+#define PORT_OCD 	PORTE
+#define PIN_OCD  	PINE
+#define OCD_IDX  	0
+
+#define DDR_OC0B  	DDRE
+#define PORT_OC0B 	PORTE
+#define PIN_OC0B  	PINE
+#define OC0B_IDX  	1
+
+#define DDR_ADC0  	DDRE
+#define PORT_ADC0 	PORTE
+#define PIN_ADC0  	PINE
+#define ADC0_IDX  	2
+
+
 #endif /* _AVR_IO90PWM216_H_ */
Index: include/avr/io2323.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io2323.h,v
retrieving revision 1.13
diff -u -r1.13 io2323.h
--- include/avr/io2323.h	11 Feb 2009 17:53:34 -0000	1.13
+++ include/avr/io2323.h	26 Mar 2009 20:10:20 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -102,10 +103,12 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF0_num 		2
 #define TIMER0_OVF0_vect		_VECTOR(2)
 #define SIG_OVERFLOW0			_VECTOR(2)
 
@@ -195,6 +198,33 @@
 #define SIGNATURE_2 0x02
 
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+
 #endif  /* _AVR_IO2323_H_ */
 
 /* Signature */
Index: include/avr/iom88p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom88p.h,v
retrieving revision 1.16
diff -u -r1.16 iom88p.h
--- include/avr/iom88p.h	11 Feb 2009 17:53:37 -0000	1.16
+++ include/avr/iom88p.h	26 Mar 2009 20:10:34 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -785,30 +786,55 @@
 
 /* Interrupt Vectors */
 /* Interrupt Vector 0 is the reset vector. */
+#define INT0_num          1
 #define INT0_vect         _VECTOR(1)   /* External Interrupt Request 0 */
+#define INT1_num          2
 #define INT1_vect         _VECTOR(2)   /* External Interrupt Request 1 */
+#define PCINT0_num        3
 #define PCINT0_vect       _VECTOR(3)   /* Pin Change Interrupt Request 0 */
+#define PCINT1_num        4
 #define PCINT1_vect       _VECTOR(4)   /* Pin Change Interrupt Request 0 */
+#define PCINT2_num        5
 #define PCINT2_vect       _VECTOR(5)   /* Pin Change Interrupt Request 1 */
+#define WDT_num           6
 #define WDT_vect          _VECTOR(6)   /* Watchdog Time-out Interrupt */
+#define TIMER2_COMPA_num  7
 #define TIMER2_COMPA_vect _VECTOR(7)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPB_num  8
 #define TIMER2_COMPB_vect _VECTOR(8)   /* Timer/Counter2 Compare Match A */
+#define TIMER2_OVF_num    9
 #define TIMER2_OVF_vect   _VECTOR(9)   /* Timer/Counter2 Overflow */
+#define TIMER1_CAPT_num   10
 #define TIMER1_CAPT_vect  _VECTOR(10)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num  11
 #define TIMER1_COMPA_vect _VECTOR(11)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num  12
 #define TIMER1_COMPB_vect _VECTOR(12)  /* Timer/Counter1 Compare Match B */ 
+#define TIMER1_OVF_num    13
 #define TIMER1_OVF_vect   _VECTOR(13)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num  14
 #define TIMER0_COMPA_vect _VECTOR(14)  /* TimerCounter0 Compare Match A */
+#define TIMER0_COMPB_num  15
 #define TIMER0_COMPB_vect _VECTOR(15)  /* TimerCounter0 Compare Match B */
+#define TIMER0_OVF_num    16
 #define TIMER0_OVF_vect   _VECTOR(16)  /* Timer/Couner0 Overflow */
+#define SPI_STC_num       17
 #define SPI_STC_vect      _VECTOR(17)  /* SPI Serial Transfer Complete */
+#define USART_RX_num      18
 #define USART_RX_vect     _VECTOR(18)  /* USART Rx Complete */
+#define USART_UDRE_num    19
 #define USART_UDRE_vect   _VECTOR(19)  /* USART, Data Register Empty */
+#define USART_TX_num      20
 #define USART_TX_vect     _VECTOR(20)  /* USART Tx Complete */
+#define ADC_num           21
 #define ADC_vect          _VECTOR(21)  /* ADC Conversion Complete */
+#define EE_READY_num      22
 #define EE_READY_vect     _VECTOR(22)  /* EEPROM Ready */
+#define ANALOG_COMP_num   23
 #define ANALOG_COMP_vect  _VECTOR(23)  /* Analog Comparator */
+#define TWI_num           24
 #define TWI_vect          _VECTOR(24)  /* Two-wire Serial Interface */
+#define SPM_READY_num     25
 #define SPM_READY_vect    _VECTOR(25)  /* Store Program Memory Read */
 
 #define _VECTORS_SIZE (26 * 2)
@@ -871,4 +897,276 @@
 #define SIGNATURE_2 0x0F
 
 
+/* Device Pin Definitions */
+#define DDR_ICP1  	DDRB
+#define PORT_ICP1 	PORTB
+#define PIN_ICP1  	PINB
+#define ICP1_IDX  	0
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT16  	DDRD
+#define PORT_PCINT16 	PORTD
+#define PIN_PCINT16  	PIND
+#define PCINT16_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT17  	DDRD
+#define PORT_PCINT17 	PORTD
+#define PIN_PCINT17  	PIND
+#define PCINT17_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT18  	DDRD
+#define PORT_PCINT18 	PORTD
+#define PIN_PCINT18  	PIND
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRD
+#define PORT_PCINT19 	PORTD
+#define PIN_PCINT19  	PIND
+#define PCINT19_IDX  	3
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	3
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_PCINT20  	DDRD
+#define PORT_PCINT20 	PORTD
+#define PIN_PCINT20  	PIND
+#define PCINT20_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_PCINT21  	DDRD
+#define PORT_PCINT21 	PORTD
+#define PIN_PCINT21  	PIND
+#define PCINT21_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	6
+
+#define DDR_PCINT22  	DDRD
+#define PORT_PCINT22 	PORTD
+#define PIN_PCINT22  	PIND
+#define PCINT22_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+#define DDR_PCINT23  	DDRD
+#define PORT_PCINT23 	PORTD
+#define PIN_PCINT23  	PIND
+#define PCINT23_IDX  	7
+
+
 #endif  /* _AVR_IOM88P_H_ */
Index: include/avr/iom3290.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom3290.h,v
retrieving revision 1.14
diff -u -r1.14 iom3290.h
--- include/avr/iom3290.h	11 Feb 2009 17:53:36 -0000	1.14
+++ include/avr/iom3290.h	26 Mar 2009 20:10:30 -0000
@@ -1,5 +1,6 @@
 /* Copyright (c) 2004 Eric B. Weddington
    Copyright (c) 2005, 2006, 2007 Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1000,98 +1001,122 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART, Rx Complete */
+#define USART_RX_num 			13
 #define USART_RX_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART Data register Empty */
+#define USART_UDRE_num 			14
 #define USART_UDRE_vect			_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* LCD Start of Frame */
+#define LCD_num 			22
 #define LCD_vect			_VECTOR(22)
 #define SIG_LCD				_VECTOR(22)
 
 /* Pin Change Interrupt Request 2 */
+#define PCINT2_num 			23
 #define PCINT2_vect			_VECTOR(23)
 #define SIG_PIN_CHANGE2			_VECTOR(23)
 
 /* Pin Change Interrupt Request 3 */
+#define PCINT3_num 			24
 #define PCINT3_vect			_VECTOR(24)
 #define SIG_PIN_CHANGE3			_VECTOR(24)
 
@@ -1152,4 +1177,536 @@
 #define SIGNATURE_2 0x04
 
 
+/* Device Pin Definitions */
+#define DDR_COM0  	DDRA
+#define PORT_COM0 	PORTA
+#define PIN_COM0  	PINA
+#define COM0_IDX  	0
+
+#define DDR_COM1  	DDRA
+#define PORT_COM1 	PORTA
+#define PIN_COM1  	PINA
+#define COM1_IDX  	1
+
+#define DDR_COM2  	DDRA
+#define PORT_COM2 	PORTA
+#define PIN_COM2  	PINA
+#define COM2_IDX  	2
+
+#define DDR_COM3  	DDRA
+#define PORT_COM3 	PORTA
+#define PIN_COM3  	PINA
+#define COM3_IDX  	3
+
+#define DDR_SEG0  	DDRA
+#define PORT_SEG0 	PORTA
+#define PIN_SEG0  	PINA
+#define SEG0_IDX  	4
+
+#define DDR_SEG1  	DDRA
+#define PORT_SEG1 	PORTA
+#define PIN_SEG1  	PINA
+#define SEG1_IDX  	5
+
+#define DDR_SEG2  	DDRA
+#define PORT_SEG2 	PORTA
+#define PIN_SEG2  	PINA
+#define SEG2_IDX  	6
+
+#define DDR_SEG3  	DDRA
+#define PORT_SEG3 	PORTA
+#define PIN_SEG3  	PINA
+#define SEG3_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SEG16  	DDRC
+#define PORT_SEG16 	PORTC
+#define PIN_SEG16  	PINC
+#define SEG16_IDX  	0
+
+#define DDR_SEG15  	DDRC
+#define PORT_SEG15 	PORTC
+#define PIN_SEG15  	PINC
+#define SEG15_IDX  	1
+
+#define DDR_SEG14  	DDRC
+#define PORT_SEG14 	PORTC
+#define PIN_SEG14  	PINC
+#define SEG14_IDX  	2
+
+#define DDR_SEG13  	DDRC
+#define PORT_SEG13 	PORTC
+#define PIN_SEG13  	PINC
+#define SEG13_IDX  	3
+
+#define DDR_SEG12  	DDRC
+#define PORT_SEG12 	PORTC
+#define PIN_SEG12  	PINC
+#define SEG12_IDX  	4
+
+#define DDR_SEG11  	DDRC
+#define PORT_SEG11 	PORTC
+#define PIN_SEG11  	PINC
+#define SEG11_IDX  	5
+
+#define DDR_SEG6  	DDRC
+#define PORT_SEG6 	PORTC
+#define PIN_SEG6  	PINC
+#define SEG6_IDX  	6
+
+#define DDR_SEG5  	DDRC
+#define PORT_SEG5 	PORTC
+#define PIN_SEG5  	PINC
+#define SEG5_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_SEG26  	DDRD
+#define PORT_SEG26 	PORTD
+#define PIN_SEG26  	PIND
+#define SEG26_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_SEG25  	DDRD
+#define PORT_SEG25 	PORTD
+#define PIN_SEG25  	PIND
+#define SEG25_IDX  	1
+
+#define DDR_SEG24  	DDRD
+#define PORT_SEG24 	PORTD
+#define PIN_SEG24  	PIND
+#define SEG24_IDX  	2
+
+#define DDR_SEG23  	DDRD
+#define PORT_SEG23 	PORTD
+#define PIN_SEG23  	PIND
+#define SEG23_IDX  	3
+
+#define DDR_SEG22  	DDRD
+#define PORT_SEG22 	PORTD
+#define PIN_SEG22  	PIND
+#define SEG22_IDX  	4
+
+#define DDR_SEG21  	DDRD
+#define PORT_SEG21 	PORTD
+#define PIN_SEG21  	PIND
+#define SEG21_IDX  	5
+
+#define DDR_SEG20  	DDRD
+#define PORT_SEG20 	PORTD
+#define PIN_SEG20  	PIND
+#define SEG20_IDX  	6
+
+#define DDR_SEG19  	DDRD
+#define PORT_SEG19 	PORTD
+#define PIN_SEG19  	PIND
+#define SEG19_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_SEG18  	DDRG
+#define PORT_SEG18 	PORTG
+#define PIN_SEG18  	PING
+#define SEG18_IDX  	0
+
+#define DDR_SEG17  	DDRG
+#define PORT_SEG17 	PORTG
+#define PIN_SEG17  	PING
+#define SEG17_IDX  	1
+
+#define DDR_SEG4  	DDRG
+#define PORT_SEG4 	PORTG
+#define PIN_SEG4  	PING
+#define SEG4_IDX  	2
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_SEG33  	DDRG
+#define PORT_SEG33 	PORTG
+#define PIN_SEG33  	PING
+#define SEG33_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_SEG32  	DDRG
+#define PORT_SEG32 	PORTG
+#define PIN_SEG32  	PING
+#define SEG32_IDX  	4
+
+#define DDR_PCINT16  	DDRH
+#define PORT_PCINT16 	PORTH
+#define PIN_PCINT16  	PINH
+#define PCINT16_IDX  	0
+
+#define DDR_SEG10  	DDRH
+#define PORT_SEG10 	PORTH
+#define PIN_SEG10  	PINH
+#define SEG10_IDX  	0
+
+#define DDR_PCINT17  	DDRH
+#define PORT_PCINT17 	PORTH
+#define PIN_PCINT17  	PINH
+#define PCINT17_IDX  	1
+
+#define DDR_SEG9  	DDRH
+#define PORT_SEG9 	PORTH
+#define PIN_SEG9  	PINH
+#define SEG9_IDX  	1
+
+#define DDR_PCINT18  	DDRH
+#define PORT_PCINT18 	PORTH
+#define PIN_PCINT18  	PINH
+#define PCINT18_IDX  	2
+
+#define DDR_SEG8  	DDRH
+#define PORT_SEG8 	PORTH
+#define PIN_SEG8  	PINH
+#define SEG8_IDX  	2
+
+#define DDR_PCINT19  	DDRH
+#define PORT_PCINT19 	PORTH
+#define PIN_PCINT19  	PINH
+#define PCINT19_IDX  	3
+
+#define DDR_SEG7  	DDRH
+#define PORT_SEG7 	PORTH
+#define PIN_SEG7  	PINH
+#define SEG7_IDX  	3
+
+#define DDR_PCINT20  	DDRH
+#define PORT_PCINT20 	PORTH
+#define PIN_PCINT20  	PINH
+#define PCINT20_IDX  	4
+
+#define DDR_SEG39  	DDRH
+#define PORT_SEG39 	PORTH
+#define PIN_SEG39  	PINH
+#define SEG39_IDX  	4
+
+#define DDR_PCINT21  	DDRH
+#define PORT_PCINT21 	PORTH
+#define PIN_PCINT21  	PINH
+#define PCINT21_IDX  	5
+
+#define DDR_SEG38  	DDRH
+#define PORT_SEG38 	PORTH
+#define PIN_SEG38  	PINH
+#define SEG38_IDX  	5
+
+#define DDR_PCINT22  	DDRH
+#define PORT_PCINT22 	PORTH
+#define PIN_PCINT22  	PINH
+#define PCINT22_IDX  	6
+
+#define DDR_SEG37  	DDRH
+#define PORT_SEG37 	PORTH
+#define PIN_SEG37  	PINH
+#define SEG37_IDX  	6
+
+#define DDR_PCINT23  	DDRH
+#define PORT_PCINT23 	PORTH
+#define PIN_PCINT23  	PINH
+#define PCINT23_IDX  	7
+
+#define DDR_SEG36  	DDRH
+#define PORT_SEG36 	PORTH
+#define PIN_SEG36  	PINH
+#define SEG36_IDX  	7
+
+#define DDR_PCINT24  	DDRJ
+#define PORT_PCINT24 	PORTJ
+#define PIN_PCINT24  	PINJ
+#define PCINT24_IDX  	0
+
+#define DDR_SEG35  	DDRJ
+#define PORT_SEG35 	PORTJ
+#define PIN_SEG35  	PINJ
+#define SEG35_IDX  	0
+
+#define DDR_PCINT25  	DDRJ
+#define PORT_PCINT25 	PORTJ
+#define PIN_PCINT25  	PINJ
+#define PCINT25_IDX  	1
+
+#define DDR_SEG33  	DDRJ
+#define PORT_SEG33 	PORTJ
+#define PIN_SEG33  	PINJ
+#define SEG33_IDX  	1
+
+#define DDR_PCINT26  	DDRJ
+#define PORT_PCINT26 	PORTJ
+#define PIN_PCINT26  	PINJ
+#define PCINT26_IDX  	2
+
+#define DDR_SEG31  	DDRJ
+#define PORT_SEG31 	PORTJ
+#define PIN_SEG31  	PINJ
+#define SEG31_IDX  	2
+
+#define DDR_PCINT27  	DDRJ
+#define PORT_PCINT27 	PORTJ
+#define PIN_PCINT27  	PINJ
+#define PCINT27_IDX  	3
+
+#define DDR_SEG30  	DDRJ
+#define PORT_SEG30 	PORTJ
+#define PIN_SEG30  	PINJ
+#define SEG30_IDX  	3
+
+#define DDR_PCINT28  	DDRJ
+#define PORT_PCINT28 	PORTJ
+#define PIN_PCINT28  	PINJ
+#define PCINT28_IDX  	4
+
+#define DDR_SEG29  	DDRJ
+#define PORT_SEG29 	PORTJ
+#define PIN_SEG29  	PINJ
+#define SEG29_IDX  	4
+
+#define DDR_PCINT29  	DDRJ
+#define PORT_PCINT29 	PORTJ
+#define PIN_PCINT29  	PINJ
+#define PCINT29_IDX  	5
+
+#define DDR_SEG28  	DDRJ
+#define PORT_SEG28 	PORTJ
+#define PIN_SEG28  	PINJ
+#define SEG28_IDX  	5
+
+#define DDR_PCINT30  	DDRJ
+#define PORT_PCINT30 	PORTJ
+#define PIN_PCINT30  	PINJ
+#define PCINT30_IDX  	6
+
+#define DDR_SEG27  	DDRJ
+#define PORT_SEG27 	PORTJ
+#define PIN_SEG27  	PINJ
+#define SEG27_IDX  	6
+
+
 #endif /* _AVR_IOM3290_H_ */
Index: include/avr/iotn22.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn22.h,v
retrieving revision 1.15
diff -u -r1.15 iotn22.h
--- include/avr/iotn22.h	11 Feb 2009 17:53:37 -0000	1.15
+++ include/avr/iotn22.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -102,10 +103,12 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF0_num 		2
 #define TIMER0_OVF0_vect		_VECTOR(2)
 #define SIG_OVERFLOW0			_VECTOR(2)
 
@@ -202,4 +205,36 @@
 #define SIGNATURE_2 0x06
 
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_CLOCK  	DDRB
+#define PORT_CLOCK 	PORTB
+#define PIN_CLOCK  	PINB
+#define CLOCK_IDX  	3
+
+
 #endif /* _AVR_IOTN22_H_ */
Index: include/avr/io1200.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io1200.h,v
retrieving revision 1.11
diff -u -r1.11 io1200.h
--- include/avr/io1200.h	13 Aug 2008 23:29:49 -0000	1.11
+++ include/avr/io1200.h	26 Mar 2009 20:10:20 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -115,14 +116,17 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			2
 #define TIMER0_OVF_vect			_VECTOR(2)
 #define SIG_OVERFLOW0			_VECTOR(2)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			3
 #define ANA_COMP_vect			_VECTOR(3)
 #define SIG_COMPARATOR			_VECTOR(3)
 
@@ -267,4 +271,41 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+
 #endif  /* _AVR_IO1200_H_ */
Index: include/avr/iotn2313.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn2313.h,v
retrieving revision 1.22
diff -u -r1.22 iotn2313.h
--- include/avr/iotn2313.h	11 Feb 2009 18:43:54 -0000	1.22
+++ include/avr/iotn2313.h	26 Mar 2009 20:10:36 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004, 2005, 2006 Bob Paddock
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -499,81 +500,99 @@
 /* Interrupt vectors: */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 #define SIG_INT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 #define SIG_INT1			_VECTOR(2)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		3
 #define TIMER1_CAPT_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 #define SIG_TIMER1_CAPT			_VECTOR(3)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		4
 #define TIMER1_COMPA_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 #define SIG_TIMER1_COMPA		_VECTOR(4)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			5
 #define TIMER1_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW1			_VECTOR(5)
 #define SIG_TIMER1_OVF			_VECTOR(5)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			6
 #define TIMER0_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW0			_VECTOR(6)
 #define SIG_TIMER0_OVF			_VECTOR(6)
 
 /* USART, Rx Complete */
+#define USART_RX_num 			7
 #define USART_RX_vect			_VECTOR(7)
 #define SIG_USART0_RECV			_VECTOR(7)
 #define SIG_USART0_RX			_VECTOR(7)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			8
 #define USART_UDRE_vect			_VECTOR(8)
 #define SIG_USART0_DATA			_VECTOR(8)
 #define SIG_USART0_UDRE			_VECTOR(8)
 
 /* USART, Tx Complete */
+#define USART_TX_num 			9
 #define USART_TX_vect			_VECTOR(9)
 #define SIG_USART0_TRANS		_VECTOR(9)
 #define SIG_USART0_TX			_VECTOR(9)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			10
 #define ANA_COMP_vect			_VECTOR(10)
 #define SIG_COMPARATOR			_VECTOR(10)
 #define SIG_ANALOG_COMP			_VECTOR(10)
+#define PCINT_num 			11
 #define PCINT_vect			_VECTOR(11)
 #define SIG_PIN_CHANGE			_VECTOR(11)
 #define SIG_PCINT			_VECTOR(11)
+#define TIMER1_COMPB_num 		12
 #define TIMER1_COMPB_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(12)
 #define SIG_TIMER1_COMPB		_VECTOR(12)
+#define TIMER0_COMPA_num 		13
 #define TIMER0_COMPA_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(13)
 #define SIG_TIMER0_COMPA		_VECTOR(13)
+#define TIMER0_COMPB_num 		14
 #define TIMER0_COMPB_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(14)
 #define SIG_TIMER0_COMPB		_VECTOR(14)
 
 /* USI Start Condition */
+#define USI_START_num 			15
 #define USI_START_vect			_VECTOR(15)
 #define SIG_USI_START			_VECTOR(15)
 #define SIG_USI_START			_VECTOR(15)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		16
 #define USI_OVERFLOW_vect		_VECTOR(16)
 #define SIG_USI_OVERFLOW		_VECTOR(16)
 #define SIG_USI_OVERFLOW		_VECTOR(16)
+#define EEPROM_READY_num 		17
 #define EEPROM_READY_vect		_VECTOR(17)
 #define SIG_EEPROM_READY		_VECTOR(17)
 #define SIG_EE_READY			_VECTOR(17)
 
 /* Watchdog Timer Overflow */
+#define WDT_OVERFLOW_num 		18
 #define WDT_OVERFLOW_vect		_VECTOR(18)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(18)
 #define SIG_WDT_OVERFLOW		_VECTOR(18)
@@ -630,4 +649,111 @@
 #define SIGNATURE_2 0x0A
 
 
+/* Device Pin Definitions */
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	2
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	3
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_DI  	DDRB
+#define PORT_DI 	PORTB
+#define PIN_DI  	PINB
+#define DI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_DO  	DDRB
+#define PORT_DO 	PORTB
+#define PIN_DO  	PINB
+#define DO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_SCL  	DDRB
+#define PORT_SCL 	PORTB
+#define PIN_SCL  	PINB
+#define SCL_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	2
+
+#define DDR_CKOUT  	DDRD
+#define PORT_CKOUT 	PORTD
+#define PIN_CKOUT  	PIND
+#define CKOUT_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+
 #endif  /* _AVR_IOTN2313_H_ */
Index: include/avr/iom3250.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom3250.h,v
retrieving revision 1.19
diff -u -r1.19 iom3250.h
--- include/avr/iom3250.h	11 Feb 2009 17:53:36 -0000	1.19
+++ include/avr/iom3250.h	26 Mar 2009 20:10:29 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004, 2005, 2006, 2007 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -757,97 +758,123 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A	_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B	_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				    _VECTOR(12)
 
 /* USART, Rx Complete */
+#define USART_RX_num 			13
 #define USART_RX_vect			_VECTOR(13)
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)  /* Alias */
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART Data register Empty */
+#define USART_UDRE_num 			14
 #define USART_UDRE_vect			_VECTOR(14)
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)  /* Alias */
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
+#define USART_TX_num 			15
 #define USART_TX_vect			_VECTOR(15)  /* Alias */
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* Pin Change Interrupt Request 2 */
+#define PCINT2_num 			23
 #define PCINT2_vect			_VECTOR(23)
 #define SIG_PIN_CHANGE2			_VECTOR(23)
 
 /* Pin Change Interrupt Request 3 */
+#define PCINT3_num 			24
 #define PCINT3_vect			_VECTOR(24)
 #define SIG_PIN_CHANGE3			_VECTOR(24)
 
@@ -908,4 +935,316 @@
 #define SIGNATURE_2 0x06
 
 
+/* Device Pin Definitions */
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_PCINT16  	DDRH
+#define PORT_PCINT16 	PORTH
+#define PIN_PCINT16  	PINH
+#define PCINT16_IDX  	0
+
+#define DDR_PCINT17  	DDRH
+#define PORT_PCINT17 	PORTH
+#define PIN_PCINT17  	PINH
+#define PCINT17_IDX  	1
+
+#define DDR_PCINT18  	DDRH
+#define PORT_PCINT18 	PORTH
+#define PIN_PCINT18  	PINH
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRH
+#define PORT_PCINT19 	PORTH
+#define PIN_PCINT19  	PINH
+#define PCINT19_IDX  	3
+
+#define DDR_PCINT20  	DDRH
+#define PORT_PCINT20 	PORTH
+#define PIN_PCINT20  	PINH
+#define PCINT20_IDX  	4
+
+#define DDR_PCINT21  	DDRH
+#define PORT_PCINT21 	PORTH
+#define PIN_PCINT21  	PINH
+#define PCINT21_IDX  	5
+
+#define DDR_PCINT22  	DDRH
+#define PORT_PCINT22 	PORTH
+#define PIN_PCINT22  	PINH
+#define PCINT22_IDX  	6
+
+#define DDR_PCINT23  	DDRH
+#define PORT_PCINT23 	PORTH
+#define PIN_PCINT23  	PINH
+#define PCINT23_IDX  	7
+
+#define DDR_PCINT24  	DDRJ
+#define PORT_PCINT24 	PORTJ
+#define PIN_PCINT24  	PINJ
+#define PCINT24_IDX  	0
+
+#define DDR_PCINT25  	DDRJ
+#define PORT_PCINT25 	PORTJ
+#define PIN_PCINT25  	PINJ
+#define PCINT25_IDX  	1
+
+#define DDR_PCINT26  	DDRJ
+#define PORT_PCINT26 	PORTJ
+#define PIN_PCINT26  	PINJ
+#define PCINT26_IDX  	2
+
+#define DDR_PCINT27  	DDRJ
+#define PORT_PCINT27 	PORTJ
+#define PIN_PCINT27  	PINJ
+#define PCINT27_IDX  	3
+
+#define DDR_PCINT28  	DDRJ
+#define PORT_PCINT28 	PORTJ
+#define PIN_PCINT28  	PINJ
+#define PCINT28_IDX  	4
+
+#define DDR_PCINT29  	DDRJ
+#define PORT_PCINT29 	PORTJ
+#define PIN_PCINT29  	PINJ
+#define PCINT29_IDX  	5
+
+#define DDR_PCINT30  	DDRJ
+#define PORT_PCINT30 	PORTJ
+#define PIN_PCINT30  	PINJ
+#define PCINT30_IDX  	6
+
+
 #endif /* _AVR_IOM3250_H_ */
Index: include/avr/iousbxx6_7.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iousbxx6_7.h,v
retrieving revision 1.5
diff -u -r1.5 iousbxx6_7.h
--- include/avr/iousbxx6_7.h	5 May 2008 01:58:07 -0000	1.5
+++ include/avr/iousbxx6_7.h	26 Mar 2009 20:10:37 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2006, Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1162,114 +1163,151 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 
 /* External Interrupt Request 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 
 /* External Interrupt Request 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 
 /* External Interrupt Request 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 
 /* External Interrupt Request 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			9
 #define PCINT0_vect			_VECTOR(9)
 
 /* USB General Interrupt Request */
+#define USB_GEN_num 			10
 #define USB_GEN_vect			_VECTOR(10)
 
 /* USB Endpoint/Pipe Interrupt Communication Request */
+#define USB_COM_num 			11
 #define USB_COM_vect			_VECTOR(11)
 
 /* Watchdog Time-out Interrupt */
+#define WDT_num 			12
 #define WDT_vect			_VECTOR(12)
 
 /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPA_num 		13
 #define TIMER2_COMPA_vect		_VECTOR(13)
 
 /* Timer/Counter2 Compare Match B */
+#define TIMER2_COMPB_num 		14
 #define TIMER2_COMPB_vect		_VECTOR(14)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			15
 #define TIMER2_OVF_vect			_VECTOR(15)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		16
 #define TIMER1_CAPT_vect		_VECTOR(16)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		17
 #define TIMER1_COMPA_vect		_VECTOR(17)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		18
 #define TIMER1_COMPB_vect		_VECTOR(18)
 
 /* Timer/Counter1 Compare Match C */
+#define TIMER1_COMPC_num 		19
 #define TIMER1_COMPC_vect		_VECTOR(19)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			20
 #define TIMER1_OVF_vect			_VECTOR(20)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMPA_num 		21
 #define TIMER0_COMPA_vect		_VECTOR(21)
 
 /* Timer/Counter0 Compare Match B */
+#define TIMER0_COMPB_num 		22
 #define TIMER0_COMPB_vect		_VECTOR(22)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			23
 #define TIMER0_OVF_vect			_VECTOR(23)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			24
 #define SPI_STC_vect			_VECTOR(24)
 
 /* USART1, Rx Complete */
+#define USART1_RX_num 			25
 #define USART1_RX_vect			_VECTOR(25)
 
 /* USART1 Data register Empty */
+#define USART1_UDRE_num 		26
 #define USART1_UDRE_vect		_VECTOR(26)
 
 /* USART1, Tx Complete */
+#define USART1_TX_num 			27
 #define USART1_TX_vect			_VECTOR(27)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		28
 #define ANALOG_COMP_vect		_VECTOR(28)
 
 /* ADC Conversion Complete */
+#define ADC_num 			29
 #define ADC_vect			_VECTOR(29)
 
 /* EEPROM Ready */
+#define EE_READY_num 			30
 #define EE_READY_vect			_VECTOR(30)
 
 /* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_num 		31
 #define TIMER3_CAPT_vect		_VECTOR(31)
 
 /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_num 		32
 #define TIMER3_COMPA_vect		_VECTOR(32)
 
 /* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_num 		33
 #define TIMER3_COMPB_vect		_VECTOR(33)
 
 /* Timer/Counter3 Compare Match C */
+#define TIMER3_COMPC_num 		34
 #define TIMER3_COMPC_vect		_VECTOR(34)
 
 /* Timer/Counter3 Overflow */
+#define TIMER3_OVF_num 			35
 #define TIMER3_OVF_vect			_VECTOR(35)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			36
 #define TWI_vect			_VECTOR(36)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			37
 #define SPM_READY_vect			_VECTOR(37)
 
 #define _VECTORS_SIZE 152
@@ -1282,4 +1320,6 @@
 # undef __AT90USBxx7__
 #endif /* __AT90USBxx7__ */
 
+/* Device Pin Definitions */
+
 #endif  /* _AVR_IOUSBXX6_7_H_ */
Index: include/avr/io2343.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io2343.h,v
retrieving revision 1.13
diff -u -r1.13 io2343.h
--- include/avr/io2343.h	11 Feb 2009 17:53:34 -0000	1.13
+++ include/avr/io2343.h	26 Mar 2009 20:10:20 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -102,10 +103,12 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF0_num 		2
 #define TIMER0_OVF0_vect		_VECTOR(2)
 #define SIG_OVERFLOW0			_VECTOR(2)
 
@@ -206,4 +209,36 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_CLOCK  	DDRB
+#define PORT_CLOCK 	PORTB
+#define PIN_CLOCK  	PINB
+#define CLOCK_IDX  	3
+
+
 #endif /* _AVR_IO2343_H_ */
Index: include/avr/iom1284p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom1284p.h,v
retrieving revision 1.15
diff -u -r1.15 iom1284p.h
--- include/avr/iom1284p.h	11 Feb 2009 17:53:35 -0000	1.15
+++ include/avr/iom1284p.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -1037,39 +1038,73 @@
 /* Interrupt Vectors */
 /* Interrupt Vector 0 is the reset vector. */
 
+#define INT0_num          1
 #define INT0_vect         _VECTOR(1)  /* External Interrupt Request 0 */
+#define INT1_num          2
 #define INT1_vect         _VECTOR(2)  /* External Interrupt Request 1 */
+#define INT2_num          3
 #define INT2_vect         _VECTOR(3)  /* External Interrupt Request 2 */
+#define PCINT0_num        4
 #define PCINT0_vect       _VECTOR(4)  /* Pin Change Interrupt Request 0 */
+#define PCINT1_num        5
 #define PCINT1_vect       _VECTOR(5)  /* Pin Change Interrupt Request 1 */
+#define PCINT2_num        6
 #define PCINT2_vect       _VECTOR(6)  /* Pin Change Interrupt Request 2 */
+#define PCINT3_num        7
 #define PCINT3_vect       _VECTOR(7)  /* Pin Change Interrupt Request 3 */
+#define WDT_num           8
 #define WDT_vect          _VECTOR(8)  /* Watchdog Time-out Interrupt */
+#define TIMER2_COMPA_num  9
 #define TIMER2_COMPA_vect _VECTOR(9)  /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPB_num  10
 #define TIMER2_COMPB_vect _VECTOR(10)  /* Timer/Counter2 Compare Match B */
+#define TIMER2_OVF_num    11
 #define TIMER2_OVF_vect   _VECTOR(11)  /* Timer/Counter2 Overflow */
+#define TIMER1_CAPT_num   12
 #define TIMER1_CAPT_vect  _VECTOR(12)  /* Timer/Counter1 Capture Event */
+#define TIMER1_COMPA_num  13
 #define TIMER1_COMPA_vect _VECTOR(13)  /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPB_num  14
 #define TIMER1_COMPB_vect _VECTOR(14)  /* Timer/Counter1 Compare Match B */
+#define TIMER1_OVF_num    15
 #define TIMER1_OVF_vect   _VECTOR(15)  /* Timer/Counter1 Overflow */
+#define TIMER0_COMPA_num  16
 #define TIMER0_COMPA_vect _VECTOR(16)  /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMPB_num  17
 #define TIMER0_COMPB_vect _VECTOR(17)  /* Timer/Counter0 Compare Match B */
+#define TIMER0_OVF_num    18
 #define TIMER0_OVF_vect   _VECTOR(18)  /* Timer/Counter0 Overflow */
+#define SPI_STC_num       19
 #define SPI_STC_vect      _VECTOR(19)  /* SPI Serial Transfer Complete */
+#define USART0_RX_num     20
 #define USART0_RX_vect    _VECTOR(20)  /* USART0, Rx Complete */
+#define USART0_UDRE_num   21
 #define USART0_UDRE_vect  _VECTOR(21)  /* USART0 Data register Empty */
+#define USART0_TX_num     22
 #define USART0_TX_vect    _VECTOR(22)  /* USART0, Tx Complete */
+#define ANALOG_COMP_num   23
 #define ANALOG_COMP_vect  _VECTOR(23)  /* Analog Comparator */
+#define ADC_num           24
 #define ADC_vect          _VECTOR(24)  /* ADC Conversion Complete */
+#define EE_READY_num      25
 #define EE_READY_vect     _VECTOR(25)  /* EEPROM Ready */
+#define TWI_num           26
 #define TWI_vect          _VECTOR(26)  /* 2-wire Serial Interface */
+#define SPM_READY_num     27
 #define SPM_READY_vect    _VECTOR(27)  /* Store Program Memory Read */
+#define USART1_RX_num     28
 #define USART1_RX_vect    _VECTOR(28)  /* USART1 RX complete */
+#define USART1_UDRE_num   29
 #define USART1_UDRE_vect  _VECTOR(29)  /* USART1 Data Register Empty */
+#define USART1_TX_num     30
 #define USART1_TX_vect    _VECTOR(30)  /* USART1 TX complete */
+#define TIMER3_CAPT_num   31
 #define TIMER3_CAPT_vect  _VECTOR(31)  /* Timer/Counter3 Capture Event */
+#define TIMER3_COMPA_num  32
 #define TIMER3_COMPA_vect _VECTOR(32)  /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPB_num  33
 #define TIMER3_COMPB_vect _VECTOR(33)  /* Timer/Counter3 Compare Match B */
+#define TIMER3_OVF_num    34
 #define TIMER3_OVF_vect   _VECTOR(34)  /* Timer/Counter3 Overflow */
 
 #define _VECTORS_SIZE (35 * 4)
@@ -1129,4 +1164,341 @@
 #define SIGNATURE_2 0x05
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_ADC5  	DDRA
+#define PORT_ADC5 	PORTA
+#define PIN_ADC5  	PINA
+#define ADC5_IDX  	5
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_XCK  	DDRB
+#define PORT_XCK 	PORTB
+#define PIN_XCK  	PINB
+#define XCK_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_OC0B  	DDRB
+#define PORT_OC0B 	PORTB
+#define PIN_OC0B  	PINB
+#define OC0B_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_PCINT16  	DDRC
+#define PORT_PCINT16 	PORTC
+#define PIN_PCINT16  	PINC
+#define PCINT16_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_PCINT17  	DDRC
+#define PORT_PCINT17 	PORTC
+#define PIN_PCINT17  	PINC
+#define PCINT17_IDX  	1
+
+#define DDR_PCINT18  	DDRC
+#define PORT_PCINT18 	PORTC
+#define PIN_PCINT18  	PINC
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRC
+#define PORT_PCINT19 	PORTC
+#define PIN_PCINT19  	PINC
+#define PCINT19_IDX  	3
+
+#define DDR_PCINT20  	DDRC
+#define PORT_PCINT20 	PORTC
+#define PIN_PCINT20  	PINC
+#define PCINT20_IDX  	4
+
+#define DDR_PCINT21  	DDRC
+#define PORT_PCINT21 	PORTC
+#define PIN_PCINT21  	PINC
+#define PCINT21_IDX  	5
+
+#define DDR_PCINT22  	DDRC
+#define PORT_PCINT22 	PORTC
+#define PIN_PCINT22  	PINC
+#define PCINT22_IDX  	6
+
+#define DDR_PCINT23  	DDRC
+#define PORT_PCINT23 	PORTC
+#define PIN_PCINT23  	PINC
+#define PCINT23_IDX  	7
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT24  	DDRD
+#define PORT_PCINT24 	PORTD
+#define PIN_PCINT24  	PIND
+#define PCINT24_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT25  	DDRD
+#define PORT_PCINT25 	PORTD
+#define PIN_PCINT25  	PIND
+#define PCINT25_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_RDX1  	DDRD
+#define PORT_RDX1 	PORTD
+#define PIN_RDX1  	PIND
+#define RDX1_IDX  	2
+
+#define DDR_PCINT26  	DDRD
+#define PORT_PCINT26 	PORTD
+#define PIN_PCINT26  	PIND
+#define PCINT26_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_TXD1  	DDRD
+#define PORT_TXD1 	PORTD
+#define PIN_TXD1  	PIND
+#define TXD1_IDX  	3
+
+#define DDR_PCINT27  	DDRD
+#define PORT_PCINT27 	PORTD
+#define PIN_PCINT27  	PIND
+#define PCINT27_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	4
+
+#define DDR_PCINT28  	DDRD
+#define PORT_PCINT28 	PORTD
+#define PIN_PCINT28  	PIND
+#define PCINT28_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_PCINT29  	DDRD
+#define PORT_PCINT29 	PORTD
+#define PIN_PCINT29  	PIND
+#define PCINT29_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	6
+
+#define DDR_PCINT30  	DDRD
+#define PORT_PCINT30 	PORTD
+#define PIN_PCINT30  	PIND
+#define PCINT30_IDX  	6
+
+#define DDR_OC2A  	DDRD
+#define PORT_OC2A 	PORTD
+#define PIN_OC2A  	PIND
+#define OC2A_IDX  	7
+
+#define DDR_PCINT31  	DDRD
+#define PORT_PCINT31 	PORTD
+#define PIN_PCINT31  	PIND
+#define PCINT31_IDX  	7
+
+
 #endif  /* _AVR_IOM1284P_H_ */
Index: include/avr/iom165.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom165.h,v
retrieving revision 1.17
diff -u -r1.17 iom165.h
--- include/avr/iom165.h	11 Feb 2009 17:53:35 -0000	1.17
+++ include/avr/iom165.h	26 Mar 2009 20:10:27 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004,2005,2006 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -674,89 +675,113 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A	_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B	_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				    _VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
+#define USART_RX_num 			13
 #define USART_RX_vect			_VECTOR(13)  /* Alias */
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
+#define USART_UDRE_num 		    14
 #define USART_UDRE_vect		    _VECTOR(14)  /* Alias */
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
+#define USART_TX_num 			15
 #define USART_TX_vect			_VECTOR(15)  /* Alias */
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
@@ -817,4 +842,241 @@
 #define SIGNATURE_2 0x07
 
 
+/* Device Pin Definitions */
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+
 #endif /* _AVR_IOM165_H_ */
Index: include/avr/iom8535.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom8535.h,v
retrieving revision 1.17
diff -u -r1.17 iom8535.h
--- include/avr/iom8535.h	11 Feb 2009 17:53:37 -0000	1.17
+++ include/avr/iom8535.h	26 Mar 2009 20:10:33 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Steinar Haugen
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -232,82 +233,102 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		3
 #define TIMER2_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(3)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			4
 #define TIMER2_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW2			_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		6
 #define TIMER1_COMPA_vect		_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		7
 #define TIMER1_COMPB_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			8
 #define TIMER1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			9
 #define TIMER0_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW0			_VECTOR(9)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			10
 #define SPI_STC_vect			_VECTOR(10)
 #define SIG_SPI				_VECTOR(10)
 
 /* USART, RX Complete */
+#define USART_RX_num 			11
 #define USART_RX_vect			_VECTOR(11)
 #define SIG_UART_RECV			_VECTOR(11)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			12
 #define USART_UDRE_vect			_VECTOR(12)
 #define SIG_UART_DATA			_VECTOR(12)
 
 /* USART, TX Complete */
+#define USART_TX_num 			13
 #define USART_TX_vect			_VECTOR(13)
 #define SIG_UART_TRANS			_VECTOR(13)
 
 /* ADC Conversion Complete */
+#define ADC_num 			14
 #define ADC_vect			_VECTOR(14)
 #define SIG_ADC				_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			16
 #define ANA_COMP_vect			_VECTOR(16)
 #define SIG_COMPARATOR			_VECTOR(16)
 
 /* Two-wire Serial Interface */
+#define TWI_num 			17
 #define TWI_vect			_VECTOR(17)
 #define SIG_2WIRE_SERIAL		_VECTOR(17)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			18
 #define INT2_vect			_VECTOR(18)
 #define SIG_INTERRUPT2			_VECTOR(18)
 
 /* TimerCounter0 Compare Match */
+#define TIMER0_COMP_num 		19
 #define TIMER0_COMP_vect		_VECTOR(19)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(19)
 
 /* Store Program Memory Read */
+#define SPM_RDY_num 			20
 #define SPM_RDY_vect			_VECTOR(20)
 #define SIG_SPM_READY			_VECTOR(20)
 
@@ -712,4 +733,151 @@
 #define SIGNATURE_2 0x08
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	4
+
+#define DDR_ADc5  	DDRA
+#define PORT_ADc5 	PORTA
+#define PIN_ADc5  	PINA
+#define ADc5_IDX  	5
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRA
+#define PORT_ADC7 	PORTA
+#define PIN_ADC7  	PINA
+#define ADC7_IDX  	7
+
+#define DDR_XCK  	DDRB
+#define PORT_XCK 	PORTB
+#define PIN_XCK  	PINB
+#define XCK_IDX  	0
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	0
+
+#define DDR_T1  	DDRB
+#define PORT_T1 	PORTB
+#define PIN_T1  	PINB
+#define T1_IDX  	1
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	2
+
+#define DDR_INT2  	DDRB
+#define PORT_INT2 	PORTB
+#define PIN_INT2  	PINB
+#define INT2_IDX  	2
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	3
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	4
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	5
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	6
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	7
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	0
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	1
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_OC1B  	DDRD
+#define PORT_OC1B 	PORTD
+#define PIN_OC1B  	PIND
+#define OC1B_IDX  	4
+
+#define DDR_OC1A  	DDRD
+#define PORT_OC1A 	PORTD
+#define PIN_OC1A  	PIND
+#define OC1A_IDX  	5
+
+#define DDR_ICP  	DDRD
+#define PORT_ICP 	PORTD
+#define PIN_ICP  	PIND
+#define ICP_IDX  	6
+
+#define DDR_OC2  	DDRD
+#define PORT_OC2 	PORTD
+#define PIN_OC2  	PIND
+#define OC2_IDX  	7
+
+
 #endif /* _AVR_IOM8535_H_ */
Index: include/avr/iom8.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom8.h,v
retrieving revision 1.21
diff -u -r1.21 iom8.h
--- include/avr/iom8.h	11 Feb 2009 17:53:37 -0000	1.21
+++ include/avr/iom8.h	26 Mar 2009 20:10:33 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -166,74 +167,92 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		3
 #define TIMER2_COMP_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(3)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			4
 #define TIMER2_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW2			_VECTOR(4)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		5
 #define TIMER1_CAPT_vect		_VECTOR(5)
 #define SIG_INPUT_CAPTURE1		_VECTOR(5)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		6
 #define TIMER1_COMPA_vect		_VECTOR(6)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		7
 #define TIMER1_COMPB_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(7)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			8
 #define TIMER1_OVF_vect			_VECTOR(8)
 #define SIG_OVERFLOW1			_VECTOR(8)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			9
 #define TIMER0_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW0			_VECTOR(9)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			10
 #define SPI_STC_vect			_VECTOR(10)
 #define SIG_SPI				_VECTOR(10)
 
 /* USART, Rx Complete */
+#define USART_RXC_num 			11
 #define USART_RXC_vect			_VECTOR(11)
 #define SIG_UART_RECV			_VECTOR(11)
 
 /* USART Data Register Empty */
+#define USART_UDRE_num 			12
 #define USART_UDRE_vect			_VECTOR(12)
 #define SIG_UART_DATA			_VECTOR(12)
 
 /* USART, Tx Complete */
+#define USART_TXC_num 			13
 #define USART_TXC_vect			_VECTOR(13)
 #define SIG_UART_TRANS			_VECTOR(13)
 
 /* ADC Conversion Complete */
+#define ADC_num 			14
 #define ADC_vect			_VECTOR(14)
 #define SIG_ADC				_VECTOR(14)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			15
 #define EE_RDY_vect			_VECTOR(15)
 #define SIG_EEPROM_READY		_VECTOR(15)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			16
 #define ANA_COMP_vect			_VECTOR(16)
 #define SIG_COMPARATOR			_VECTOR(16)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			17
 #define TWI_vect			_VECTOR(17)
 #define SIG_2WIRE_SERIAL		_VECTOR(17)
 
 /* Store Program Memory Ready */
+#define SPM_RDY_num 			18
 #define SPM_RDY_vect			_VECTOR(18)
 #define SIG_SPM_READY			_VECTOR(18)
 
@@ -611,4 +630,141 @@
 #define SIGNATURE_2 0x07
 
 
+/* Device Pin Definitions */
+#define DDR_ICP  	DDRB
+#define PORT_ICP 	PORTB
+#define PIN_ICP  	PINB
+#define ICP_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_IN1  	DDRD
+#define PORT_IN1 	PORTD
+#define PIN_IN1  	PIND
+#define IN1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+
 #endif /* _AVR_IOM8_H_ */
Index: include/avr/iousbxx2.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iousbxx2.h,v
retrieving revision 1.3
diff -u -r1.3 iousbxx2.h
--- include/avr/iousbxx2.h	12 May 2007 11:40:46 -0000	1.3
+++ include/avr/iousbxx2.h	26 Mar 2009 20:10:37 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -678,89 +679,119 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 
 /* External Interrupt Request 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 
 /* External Interrupt Request 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 
 /* External Interrupt Request 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 
 /* External Interrupt Request 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			9
 #define PCINT0_vect			_VECTOR(9)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			10
 #define PCINT1_vect			_VECTOR(10)
 
 /* USB General Interrupt Request */
+#define USB_GEN_num 			11
 #define USB_GEN_vect			_VECTOR(11)
 
 /* USB Endpoint/Pipe Interrupt Communication Request */
+#define USB_COM_num 			12
 #define USB_COM_vect			_VECTOR(12)
 
 /* Watchdog Time-out Interrupt */
+#define WDT_num 			13
 #define WDT_vect			_VECTOR(13)
 
 /* Timer/Counter2 Capture Event */
+#define TIMER1_CAPT_num 		14
 #define TIMER1_CAPT_vect		_VECTOR(14)
 
 /* Timer/Counter2 Compare Match B */
+#define TIMER1_COMPA_num 		15
 #define TIMER1_COMPA_vect		_VECTOR(15)
 
 /* Timer/Counter2 Compare Match B */
+#define TIMER1_COMPB_num 		16
 #define TIMER1_COMPB_vect		_VECTOR(16)
 
 /* Timer/Counter2 Compare Match C */
+#define TIMER1_COMPC_num 		17
 #define TIMER1_COMPC_vect		_VECTOR(17)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			18
 #define TIMER1_OVF_vect			_VECTOR(18)
 
 /* Timer/Counter0 Compare Match A */
+#define TIMER0_COMPA_num 		19
 #define TIMER0_COMPA_vect		_VECTOR(19)
 
 /* Timer/Counter0 Compare Match B */
+#define TIMER0_COMPB_num 		20
 #define TIMER0_COMPB_vect		_VECTOR(20)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			21
 #define TIMER0_OVF_vect			_VECTOR(21)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			22
 #define SPI_STC_vect			_VECTOR(22)
 
 /* USART1, Rx Complete */
+#define USART1_RX_num 			23
 #define USART1_RX_vect			_VECTOR(23)
 
 /* USART1 Data register Empty */
+#define USART1_UDRE_num 		24
 #define USART1_UDRE_vect		_VECTOR(24)
 
 /* USART1, Tx Complete */
+#define USART1_TX_num 			25
 #define USART1_TX_vect			_VECTOR(25)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		26
 #define ANALOG_COMP_vect		_VECTOR(26)
 
 /* EEPROM Ready */
+#define EE_READY_num 			27
 #define EE_READY_vect			_VECTOR(27)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			28
 #define SPM_READY_vect			_VECTOR(28)
 
 #define _VECTORS_SIZE 116
 
+/* Device Pin Definitions */
+
 #endif  /* _AVR_IOUSBXX2_H_ */
Index: include/avr/iomxxhva.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iomxxhva.h,v
retrieving revision 1.1
diff -u -r1.1 iomxxhva.h
--- include/avr/iomxxhva.h	13 May 2007 20:21:05 -0000	1.1
+++ include/avr/iomxxhva.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007, Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -454,63 +455,83 @@
 
 /* Interrupt vectors */
 /* Battery Protection Interrupt */
+#define BPINT_num 			1
 #define BPINT_vect			_VECTOR(1)
 
 /* Voltage Regulator Monitor Interrupt */
+#define VREGMON_num 			2
 #define VREGMON_vect			_VECTOR(2)
 
 /* External Interrupt Request 0 */
+#define INT0_num 			3
 #define INT0_vect			_VECTOR(3)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			4
 #define INT1_vect			_VECTOR(4)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			5
 #define INT2_vect			_VECTOR(5)
 
 /* Watchdog Timeout Interrupt */
+#define WDT_num 			6
 #define WDT_vect			_VECTOR(6)
 
 /* Timer/Counter 1 Input Capture */
+#define TIMER1_IC_num 			7
 #define TIMER1_IC_vect			_VECTOR(7)
 
 /* Timer/Counter 1 Compare A Match */
+#define TIMER1_COMPA_num 		8
 #define TIMER1_COMPA_vect		_VECTOR(8)
 
 /* Timer/Counter 1 Compare B Match */
+#define TIMER1_COMPB_num 		9
 #define TIMER1_COMPB_vect		_VECTOR(9)
 
 /* Timer/Counter 1 Overflow */
+#define TIMER1_OVF_num 			10
 #define TIMER1_OVF_vect			_VECTOR(10)
 
 /* Timer/Counter 0 Input Capture */
+#define TIMER0_IC_num 			11
 #define TIMER0_IC_vect			_VECTOR(11)
 
 /* Timer/Counter0 Compare A Match */
+#define TIMER0_COMPA_num 		12
 #define TIMER0_COMPA_vect		_VECTOR(12)
 
 /* Timer/Counter0 Compare B Match */
+#define TIMER0_COMPB_num 		13
 #define TIMER0_COMPB_vect		_VECTOR(13)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			14
 #define TIMER0_OVF_vect			_VECTOR(14)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			15
 #define SPI_STC_vect			_VECTOR(15)
 
 /* Voltage ADC Conversion Complete */
+#define VADC_num 			16
 #define VADC_vect			_VECTOR(16)
 
 /* Coulomb Counter ADC Conversion Complete */
+#define CCADC_CONV_num 			17
 #define CCADC_CONV_vect			_VECTOR(17)
 
 /* Coloumb Counter ADC Regular Current */
+#define CCADC_REG_CUR_num 		18
 #define CCADC_REG_CUR_vect		_VECTOR(18)
 
 /* Coloumb Counter ADC Accumulator */
+#define CCADC_ACC_num 			19
 #define CCADC_ACC_vect			_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 
 #if defined (__AVR_ATmega16HVA__)
@@ -520,4 +541,6 @@
 #endif
 
 
+/* Device Pin Definitions */
+
 #endif  /* _AVR_IOMXXHVA_H_ */
Index: include/avr/iom6490.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom6490.h,v
retrieving revision 1.13
diff -u -r1.13 iom6490.h
--- include/avr/iom6490.h	11 Feb 2009 17:53:37 -0000	1.13
+++ include/avr/iom6490.h	26 Mar 2009 20:10:33 -0000
@@ -1,5 +1,6 @@
 /* Copyright (c) 2004 Eric B. Weddington
    Copyright (c) 2005,2006 Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -989,98 +990,122 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART, Rx Complete */
+#define USART_RX_num 			13
 #define USART_RX_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART Data register Empty */
+#define USART_UDRE_num 			14
 #define USART_UDRE_vect			_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* LCD Start of Frame */
+#define LCD_num 			22
 #define LCD_vect			_VECTOR(22)
 #define SIG_LCD				_VECTOR(22)
 
 /* Pin Change Interrupt Request 2 */
+#define PCINT2_num 			23
 #define PCINT2_vect			_VECTOR(23)
 #define SIG_PIN_CHANGE2			_VECTOR(23)
 
 /* Pin Change Interrupt Request 3 */
+#define PCINT3_num 			24
 #define PCINT3_vect			_VECTOR(24)
 #define SIG_PIN_CHANGE3			_VECTOR(24)
 
@@ -1141,4 +1166,536 @@
 #define SIGNATURE_2 0x04
 
 
+/* Device Pin Definitions */
+#define DDR_COM0  	DDRA
+#define PORT_COM0 	PORTA
+#define PIN_COM0  	PINA
+#define COM0_IDX  	0
+
+#define DDR_COM1  	DDRA
+#define PORT_COM1 	PORTA
+#define PIN_COM1  	PINA
+#define COM1_IDX  	1
+
+#define DDR_COM2  	DDRA
+#define PORT_COM2 	PORTA
+#define PIN_COM2  	PINA
+#define COM2_IDX  	2
+
+#define DDR_COM3  	DDRA
+#define PORT_COM3 	PORTA
+#define PIN_COM3  	PINA
+#define COM3_IDX  	3
+
+#define DDR_SEG0  	DDRA
+#define PORT_SEG0 	PORTA
+#define PIN_SEG0  	PINA
+#define SEG0_IDX  	4
+
+#define DDR_SEG1  	DDRA
+#define PORT_SEG1 	PORTA
+#define PIN_SEG1  	PINA
+#define SEG1_IDX  	5
+
+#define DDR_SEG2  	DDRA
+#define PORT_SEG2 	PORTA
+#define PIN_SEG2  	PINA
+#define SEG2_IDX  	6
+
+#define DDR_SEG3  	DDRA
+#define PORT_SEG3 	PORTA
+#define PIN_SEG3  	PINA
+#define SEG3_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SEG16  	DDRC
+#define PORT_SEG16 	PORTC
+#define PIN_SEG16  	PINC
+#define SEG16_IDX  	0
+
+#define DDR_SEG15  	DDRC
+#define PORT_SEG15 	PORTC
+#define PIN_SEG15  	PINC
+#define SEG15_IDX  	1
+
+#define DDR_SEG14  	DDRC
+#define PORT_SEG14 	PORTC
+#define PIN_SEG14  	PINC
+#define SEG14_IDX  	2
+
+#define DDR_SEG13  	DDRC
+#define PORT_SEG13 	PORTC
+#define PIN_SEG13  	PINC
+#define SEG13_IDX  	3
+
+#define DDR_SEG12  	DDRC
+#define PORT_SEG12 	PORTC
+#define PIN_SEG12  	PINC
+#define SEG12_IDX  	4
+
+#define DDR_SEG11  	DDRC
+#define PORT_SEG11 	PORTC
+#define PIN_SEG11  	PINC
+#define SEG11_IDX  	5
+
+#define DDR_SEG6  	DDRC
+#define PORT_SEG6 	PORTC
+#define PIN_SEG6  	PINC
+#define SEG6_IDX  	6
+
+#define DDR_SEG5  	DDRC
+#define PORT_SEG5 	PORTC
+#define PIN_SEG5  	PINC
+#define SEG5_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_SEG26  	DDRD
+#define PORT_SEG26 	PORTD
+#define PIN_SEG26  	PIND
+#define SEG26_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_SEG25  	DDRD
+#define PORT_SEG25 	PORTD
+#define PIN_SEG25  	PIND
+#define SEG25_IDX  	1
+
+#define DDR_SEG24  	DDRD
+#define PORT_SEG24 	PORTD
+#define PIN_SEG24  	PIND
+#define SEG24_IDX  	2
+
+#define DDR_SEG23  	DDRD
+#define PORT_SEG23 	PORTD
+#define PIN_SEG23  	PIND
+#define SEG23_IDX  	3
+
+#define DDR_SEG22  	DDRD
+#define PORT_SEG22 	PORTD
+#define PIN_SEG22  	PIND
+#define SEG22_IDX  	4
+
+#define DDR_SEG21  	DDRD
+#define PORT_SEG21 	PORTD
+#define PIN_SEG21  	PIND
+#define SEG21_IDX  	5
+
+#define DDR_SEG20  	DDRD
+#define PORT_SEG20 	PORTD
+#define PIN_SEG20  	PIND
+#define SEG20_IDX  	6
+
+#define DDR_SEG19  	DDRD
+#define PORT_SEG19 	PORTD
+#define PIN_SEG19  	PIND
+#define SEG19_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_SEG18  	DDRG
+#define PORT_SEG18 	PORTG
+#define PIN_SEG18  	PING
+#define SEG18_IDX  	0
+
+#define DDR_SEG17  	DDRG
+#define PORT_SEG17 	PORTG
+#define PIN_SEG17  	PING
+#define SEG17_IDX  	1
+
+#define DDR_SEG4  	DDRG
+#define PORT_SEG4 	PORTG
+#define PIN_SEG4  	PING
+#define SEG4_IDX  	2
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_SEG33  	DDRG
+#define PORT_SEG33 	PORTG
+#define PIN_SEG33  	PING
+#define SEG33_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_SEG32  	DDRG
+#define PORT_SEG32 	PORTG
+#define PIN_SEG32  	PING
+#define SEG32_IDX  	4
+
+#define DDR_PCINT16  	DDRH
+#define PORT_PCINT16 	PORTH
+#define PIN_PCINT16  	PINH
+#define PCINT16_IDX  	0
+
+#define DDR_SEG10  	DDRH
+#define PORT_SEG10 	PORTH
+#define PIN_SEG10  	PINH
+#define SEG10_IDX  	0
+
+#define DDR_PCINT17  	DDRH
+#define PORT_PCINT17 	PORTH
+#define PIN_PCINT17  	PINH
+#define PCINT17_IDX  	1
+
+#define DDR_SEG9  	DDRH
+#define PORT_SEG9 	PORTH
+#define PIN_SEG9  	PINH
+#define SEG9_IDX  	1
+
+#define DDR_PCINT18  	DDRH
+#define PORT_PCINT18 	PORTH
+#define PIN_PCINT18  	PINH
+#define PCINT18_IDX  	2
+
+#define DDR_SEG8  	DDRH
+#define PORT_SEG8 	PORTH
+#define PIN_SEG8  	PINH
+#define SEG8_IDX  	2
+
+#define DDR_PCINT19  	DDRH
+#define PORT_PCINT19 	PORTH
+#define PIN_PCINT19  	PINH
+#define PCINT19_IDX  	3
+
+#define DDR_SEG7  	DDRH
+#define PORT_SEG7 	PORTH
+#define PIN_SEG7  	PINH
+#define SEG7_IDX  	3
+
+#define DDR_PCINT20  	DDRH
+#define PORT_PCINT20 	PORTH
+#define PIN_PCINT20  	PINH
+#define PCINT20_IDX  	4
+
+#define DDR_SEG39  	DDRH
+#define PORT_SEG39 	PORTH
+#define PIN_SEG39  	PINH
+#define SEG39_IDX  	4
+
+#define DDR_PCINT21  	DDRH
+#define PORT_PCINT21 	PORTH
+#define PIN_PCINT21  	PINH
+#define PCINT21_IDX  	5
+
+#define DDR_SEG38  	DDRH
+#define PORT_SEG38 	PORTH
+#define PIN_SEG38  	PINH
+#define SEG38_IDX  	5
+
+#define DDR_PCINT22  	DDRH
+#define PORT_PCINT22 	PORTH
+#define PIN_PCINT22  	PINH
+#define PCINT22_IDX  	6
+
+#define DDR_SEG37  	DDRH
+#define PORT_SEG37 	PORTH
+#define PIN_SEG37  	PINH
+#define SEG37_IDX  	6
+
+#define DDR_PCINT23  	DDRH
+#define PORT_PCINT23 	PORTH
+#define PIN_PCINT23  	PINH
+#define PCINT23_IDX  	7
+
+#define DDR_SEG36  	DDRH
+#define PORT_SEG36 	PORTH
+#define PIN_SEG36  	PINH
+#define SEG36_IDX  	7
+
+#define DDR_PCINT24  	DDRJ
+#define PORT_PCINT24 	PORTJ
+#define PIN_PCINT24  	PINJ
+#define PCINT24_IDX  	0
+
+#define DDR_SEG35  	DDRJ
+#define PORT_SEG35 	PORTJ
+#define PIN_SEG35  	PINJ
+#define SEG35_IDX  	0
+
+#define DDR_PCINT25  	DDRJ
+#define PORT_PCINT25 	PORTJ
+#define PIN_PCINT25  	PINJ
+#define PCINT25_IDX  	1
+
+#define DDR_SEG33  	DDRJ
+#define PORT_SEG33 	PORTJ
+#define PIN_SEG33  	PINJ
+#define SEG33_IDX  	1
+
+#define DDR_PCINT26  	DDRJ
+#define PORT_PCINT26 	PORTJ
+#define PIN_PCINT26  	PINJ
+#define PCINT26_IDX  	2
+
+#define DDR_SEG31  	DDRJ
+#define PORT_SEG31 	PORTJ
+#define PIN_SEG31  	PINJ
+#define SEG31_IDX  	2
+
+#define DDR_PCINT27  	DDRJ
+#define PORT_PCINT27 	PORTJ
+#define PIN_PCINT27  	PINJ
+#define PCINT27_IDX  	3
+
+#define DDR_SEG30  	DDRJ
+#define PORT_SEG30 	PORTJ
+#define PIN_SEG30  	PINJ
+#define SEG30_IDX  	3
+
+#define DDR_PCINT28  	DDRJ
+#define PORT_PCINT28 	PORTJ
+#define PIN_PCINT28  	PINJ
+#define PCINT28_IDX  	4
+
+#define DDR_SEG29  	DDRJ
+#define PORT_SEG29 	PORTJ
+#define PIN_SEG29  	PINJ
+#define SEG29_IDX  	4
+
+#define DDR_PCINT29  	DDRJ
+#define PORT_PCINT29 	PORTJ
+#define PIN_PCINT29  	PINJ
+#define PCINT29_IDX  	5
+
+#define DDR_SEG28  	DDRJ
+#define PORT_SEG28 	PORTJ
+#define PIN_SEG28  	PINJ
+#define SEG28_IDX  	5
+
+#define DDR_PCINT30  	DDRJ
+#define PORT_PCINT30 	PORTJ
+#define PIN_PCINT30  	PINJ
+#define PCINT30_IDX  	6
+
+#define DDR_SEG27  	DDRJ
+#define PORT_SEG27 	PORTJ
+#define PIN_SEG27  	PINJ
+#define SEG27_IDX  	6
+
+
 #endif /* _AVR_IOM6490_H_ */
Index: include/avr/iotn48.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn48.h,v
retrieving revision 1.18
diff -u -r1.18 iotn48.h
--- include/avr/iotn48.h	14 Feb 2009 01:12:54 -0000	1.18
+++ include/avr/iotn48.h	26 Mar 2009 20:10:36 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -681,24 +682,43 @@
 /* Interrupt Vectors */
 /* Interrupt vector 0 is the reset vector. */
 
+#define INT0_num          1
 #define INT0_vect         _VECTOR(1)
+#define INT1_num          2
 #define INT1_vect         _VECTOR(2)
+#define PCINT0_num        3
 #define PCINT0_vect       _VECTOR(3)
+#define PCINT1_num        4
 #define PCINT1_vect       _VECTOR(4)
+#define PCINT2_num        5
 #define PCINT2_vect       _VECTOR(5)
+#define PCINT3_num        6
 #define PCINT3_vect       _VECTOR(6)
+#define WDT_num           7
 #define WDT_vect          _VECTOR(7)
+#define TIMER1_CAPT_num   8
 #define TIMER1_CAPT_vect  _VECTOR(8)
+#define TIMER1_COMPA_num  9
 #define TIMER1_COMPA_vect _VECTOR(9)
+#define TIMER1_COMPB_num  10
 #define TIMER1_COMPB_vect _VECTOR(10)
+#define TIMER1_OVF_num    11
 #define TIMER1_OVF_vect   _VECTOR(11)
+#define TIMER0_COMPA_num  12
 #define TIMER0_COMPA_vect _VECTOR(12)
+#define TIMER0_COMPB_num  13
 #define TIMER0_COMPB_vect _VECTOR(13)
+#define TIMER0_OVF_num    14
 #define TIMER0_OVF_vect   _VECTOR(14)
+#define SPI_STC_num       15
 #define SPI_STC_vect      _VECTOR(15)
+#define ADC_num           16
 #define ADC_vect          _VECTOR(16)
+#define EE_READY_num      17
 #define EE_READY_vect     _VECTOR(17)
+#define ANALOG_COMP_num   18
 #define ANALOG_COMP_vect  _VECTOR(18)
+#define TWI_num           19
 #define TWI_vect          _VECTOR(19)
 
 #define _VECTORS_SIZE 40
@@ -754,4 +774,276 @@
 #define SIGNATURE_2 0x09
 
 
+/* Device Pin Definitions */
+#define DDR_ICP1  	DDRB
+#define PORT_ICP1 	PORTB
+#define PIN_ICP1  	PINB
+#define ICP1_IDX  	0
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT16  	DDRD
+#define PORT_PCINT16 	PORTD
+#define PIN_PCINT16  	PIND
+#define PCINT16_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT17  	DDRD
+#define PORT_PCINT17 	PORTD
+#define PIN_PCINT17  	PIND
+#define PCINT17_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT18  	DDRD
+#define PORT_PCINT18 	PORTD
+#define PIN_PCINT18  	PIND
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRD
+#define PORT_PCINT19 	PORTD
+#define PIN_PCINT19  	PIND
+#define PCINT19_IDX  	3
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	3
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_PCINT20  	DDRD
+#define PORT_PCINT20 	PORTD
+#define PIN_PCINT20  	PIND
+#define PCINT20_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_PCINT21  	DDRD
+#define PORT_PCINT21 	PORTD
+#define PIN_PCINT21  	PIND
+#define PCINT21_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	6
+
+#define DDR_PCINT22  	DDRD
+#define PORT_PCINT22 	PORTD
+#define PIN_PCINT22  	PIND
+#define PCINT22_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+#define DDR_PCINT23  	DDRD
+#define PORT_PCINT23 	PORTD
+#define PIN_PCINT23  	PIND
+#define PCINT23_IDX  	7
+
+
 #endif /* _AVR_IOTN48_H_ */
Index: include/avr/iomx8.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iomx8.h,v
retrieving revision 1.13
diff -u -r1.13 iomx8.h
--- include/avr/iomx8.h	12 Dec 2007 14:00:49 -0000	1.13
+++ include/avr/iomx8.h	26 Mar 2009 20:10:34 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004,2005, Theodore A. Roth
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -622,103 +623,128 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			3
 #define PCINT0_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE0			_VECTOR(3)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT1_num 			4
 #define PCINT1_vect			_VECTOR(4)
 #define SIG_PIN_CHANGE1			_VECTOR(4)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT2_num 			5
 #define PCINT2_vect			_VECTOR(5)
 #define SIG_PIN_CHANGE2			_VECTOR(5)
 
 /* Watchdog Time-out Interrupt */
+#define WDT_num 			6
 #define WDT_vect			_VECTOR(6)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(6)
 
 /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPA_num 		7
 #define TIMER2_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE2A		_VECTOR(7)
 
 /* Timer/Counter2 Compare Match A */
+#define TIMER2_COMPB_num 		8
 #define TIMER2_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE2B		_VECTOR(8)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			9
 #define TIMER2_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW2			_VECTOR(9)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		10
 #define TIMER1_CAPT_vect		_VECTOR(10)
 #define SIG_INPUT_CAPTURE1		_VECTOR(10)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		11
 #define TIMER1_COMPA_vect		_VECTOR(11)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(11)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		12
 #define TIMER1_COMPB_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(12)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			13
 #define TIMER1_OVF_vect			_VECTOR(13)
 #define SIG_OVERFLOW1			_VECTOR(13)
 
 /* TimerCounter0 Compare Match A */
+#define TIMER0_COMPA_num 		14
 #define TIMER0_COMPA_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(14)
 
 /* TimerCounter0 Compare Match B */
+#define TIMER0_COMPB_num 		15
 #define TIMER0_COMPB_vect		_VECTOR(15)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(15)
 
 /* Timer/Couner0 Overflow */
+#define TIMER0_OVF_num 			16
 #define TIMER0_OVF_vect			_VECTOR(16)
 #define SIG_OVERFLOW0			_VECTOR(16)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			17
 #define SPI_STC_vect			_VECTOR(17)
 #define SIG_SPI				_VECTOR(17)
 
 /* USART Rx Complete */
+#define USART_RX_num 			18
 #define USART_RX_vect			_VECTOR(18)
 #define SIG_USART_RECV			_VECTOR(18)
 
 /* USART, Data Register Empty */
+#define USART_UDRE_num 			19
 #define USART_UDRE_vect			_VECTOR(19)
 #define SIG_USART_DATA			_VECTOR(19)
 
 /* USART Tx Complete */
+#define USART_TX_num 			20
 #define USART_TX_vect			_VECTOR(20)
 #define SIG_USART_TRANS			_VECTOR(20)
 
 /* ADC Conversion Complete */
+#define ADC_num 			21
 #define ADC_vect			_VECTOR(21)
 #define SIG_ADC				_VECTOR(21)
 
 /* EEPROM Ready */
+#define EE_READY_num 			22
 #define EE_READY_vect			_VECTOR(22)
 #define SIG_EEPROM_READY		_VECTOR(22)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		23
 #define ANALOG_COMP_vect		_VECTOR(23)
 #define SIG_COMPARATOR			_VECTOR(23)
 
 /* Two-wire Serial Interface */
+#define TWI_num 			24
 #define TWI_vect			_VECTOR(24)
 #define SIG_TWI				_VECTOR(24)
 #define SIG_2WIRE_SERIAL		_VECTOR(24)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			25
 #define SPM_READY_vect			_VECTOR(25)
 #define SIG_SPM_READY			_VECTOR(25)
 
@@ -732,4 +758,276 @@
 #  define _VECTORS_SIZE 52
 #endif
 
+/* Device Pin Definitions */
+#define DDR_ICP1  	DDRB
+#define PORT_ICP1 	PORTB
+#define PIN_ICP1  	PINB
+#define ICP1_IDX  	0
+
+#define DDR_CLKO  	DDRB
+#define PORT_CLKO 	PORTB
+#define PIN_CLKO  	PINB
+#define CLKO_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	3
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	4
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_TOSC1  	DDRB
+#define PORT_TOSC1 	PORTB
+#define PIN_TOSC1  	PINB
+#define TOSC1_IDX  	6
+
+#define DDR_PCINT6  	DDRB
+#define PORT_PCINT6 	PORTB
+#define PIN_PCINT6  	PINB
+#define PCINT6_IDX  	6
+
+#define DDR_TOSC2  	DDRB
+#define PORT_TOSC2 	PORTB
+#define PIN_TOSC2  	PINB
+#define TOSC2_IDX  	7
+
+#define DDR_PCINT7  	DDRB
+#define PORT_PCINT7 	PORTB
+#define PIN_PCINT7  	PINB
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_PCINT8  	DDRC
+#define PORT_PCINT8 	PORTC
+#define PIN_PCINT8  	PINC
+#define PCINT8_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_PCINT9  	DDRC
+#define PORT_PCINT9 	PORTC
+#define PIN_PCINT9  	PINC
+#define PCINT9_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_PCINT10  	DDRC
+#define PORT_PCINT10 	PORTC
+#define PIN_PCINT10  	PINC
+#define PCINT10_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_PCINT11  	DDRC
+#define PORT_PCINT11 	PORTC
+#define PIN_PCINT11  	PINC
+#define PCINT11_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_SDA  	DDRC
+#define PORT_SDA 	PORTC
+#define PIN_SDA  	PINC
+#define SDA_IDX  	4
+
+#define DDR_PCINT12  	DDRC
+#define PORT_PCINT12 	PORTC
+#define PIN_PCINT12  	PINC
+#define PCINT12_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_SCL  	DDRC
+#define PORT_SCL 	PORTC
+#define PIN_SCL  	PINC
+#define SCL_IDX  	5
+
+#define DDR_PCINT13  	DDRC
+#define PORT_PCINT13 	PORTC
+#define PIN_PCINT13  	PINC
+#define PCINT13_IDX  	5
+
+#define DDR_PCINT14  	DDRC
+#define PORT_PCINT14 	PORTC
+#define PIN_PCINT14  	PINC
+#define PCINT14_IDX  	6
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_PCINT16  	DDRD
+#define PORT_PCINT16 	PORTD
+#define PIN_PCINT16  	PIND
+#define PCINT16_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_PCINT17  	DDRD
+#define PORT_PCINT17 	PORTD
+#define PIN_PCINT17  	PIND
+#define PCINT17_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_PCINT18  	DDRD
+#define PORT_PCINT18 	PORTD
+#define PIN_PCINT18  	PIND
+#define PCINT18_IDX  	2
+
+#define DDR_PCINT19  	DDRD
+#define PORT_PCINT19 	PORTD
+#define PIN_PCINT19  	PIND
+#define PCINT19_IDX  	3
+
+#define DDR_OC2B  	DDRD
+#define PORT_OC2B 	PORTD
+#define PIN_OC2B  	PIND
+#define OC2B_IDX  	3
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_XCK  	DDRD
+#define PORT_XCK 	PORTD
+#define PIN_XCK  	PIND
+#define XCK_IDX  	4
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_PCINT20  	DDRD
+#define PORT_PCINT20 	PORTD
+#define PIN_PCINT20  	PIND
+#define PCINT20_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_OC0B  	DDRD
+#define PORT_OC0B 	PORTD
+#define PIN_OC0B  	PIND
+#define OC0B_IDX  	5
+
+#define DDR_PCINT21  	DDRD
+#define PORT_PCINT21 	PORTD
+#define PIN_PCINT21  	PIND
+#define PCINT21_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_OC0A  	DDRD
+#define PORT_OC0A 	PORTD
+#define PIN_OC0A  	PIND
+#define OC0A_IDX  	6
+
+#define DDR_PCINT22  	DDRD
+#define PORT_PCINT22 	PORTD
+#define PIN_PCINT22  	PIND
+#define PCINT22_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+#define DDR_PCINT23  	DDRD
+#define PORT_PCINT23 	PORTD
+#define PIN_PCINT23  	PIND
+#define PCINT23_IDX  	7
+
+
 #endif /* _AVR_IOM8_H_ */
Index: include/avr/iom325.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom325.h,v
retrieving revision 1.18
diff -u -r1.18 iom325.h
--- include/avr/iom325.h	11 Feb 2009 17:53:36 -0000	1.18
+++ include/avr/iom325.h	26 Mar 2009 20:10:29 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004, 2005, 2006, 2007 Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -676,86 +677,107 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
@@ -818,4 +840,241 @@
 #define SIGNATURE_2 0x05
 
 
+/* Device Pin Definitions */
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+
 #endif /* _AVR_IOM325_H_ */
Index: include/avr/iom169.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom169.h,v
retrieving revision 1.32
diff -u -r1.32 iom169.h
--- include/avr/iom169.h	11 Feb 2009 17:53:36 -0000	1.32
+++ include/avr/iom169.h	26 Mar 2009 20:10:28 -0000
@@ -1,6 +1,7 @@
 /* Copyright (c) 2002, 2003, 2004, 2005 
    Juergen Schilling <juergen.schilling@honeywell.com>
    Eric B. Weddington
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -328,90 +329,112 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
 #define SIG_USART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
 #define SIG_USART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_USART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* LCD Start of Frame */
+#define LCD_num 			22
 #define LCD_vect			_VECTOR(22)
 #define SIG_LCD				_VECTOR(22)
 
@@ -1104,4 +1127,371 @@
 #define SIGNATURE_2 0x05
 
 
+/* Device Pin Definitions */
+#define DDR_COM0  	DDRA
+#define PORT_COM0 	PORTA
+#define PIN_COM0  	PINA
+#define COM0_IDX  	0
+
+#define DDR_COM1  	DDRA
+#define PORT_COM1 	PORTA
+#define PIN_COM1  	PINA
+#define COM1_IDX  	1
+
+#define DDR_COM2  	DDRA
+#define PORT_COM2 	PORTA
+#define PIN_COM2  	PINA
+#define COM2_IDX  	2
+
+#define DDR_COM3  	DDRA
+#define PORT_COM3 	PORTA
+#define PIN_COM3  	PINA
+#define COM3_IDX  	3
+
+#define DDR_SEG0  	DDRA
+#define PORT_SEG0 	PORTA
+#define PIN_SEG0  	PINA
+#define SEG0_IDX  	4
+
+#define DDR_SEG1  	DDRA
+#define PORT_SEG1 	PORTA
+#define PIN_SEG1  	PINA
+#define SEG1_IDX  	5
+
+#define DDR_SEG2  	DDRA
+#define PORT_SEG2 	PORTA
+#define PIN_SEG2  	PINA
+#define SEG2_IDX  	6
+
+#define DDR_SEG3  	DDRA
+#define PORT_SEG3 	PORTA
+#define PIN_SEG3  	PINA
+#define SEG3_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SEG12  	DDRC
+#define PORT_SEG12 	PORTC
+#define PIN_SEG12  	PINC
+#define SEG12_IDX  	0
+
+#define DDR_SEG11  	DDRC
+#define PORT_SEG11 	PORTC
+#define PIN_SEG11  	PINC
+#define SEG11_IDX  	1
+
+#define DDR_SEG10  	DDRC
+#define PORT_SEG10 	PORTC
+#define PIN_SEG10  	PINC
+#define SEG10_IDX  	2
+
+#define DDR_SEG9  	DDRC
+#define PORT_SEG9 	PORTC
+#define PIN_SEG9  	PINC
+#define SEG9_IDX  	3
+
+#define DDR_SEG8  	DDRC
+#define PORT_SEG8 	PORTC
+#define PIN_SEG8  	PINC
+#define SEG8_IDX  	4
+
+#define DDR_SEG7  	DDRC
+#define PORT_SEG7 	PORTC
+#define PIN_SEG7  	PINC
+#define SEG7_IDX  	5
+
+#define DDR_SEG6  	DDRC
+#define PORT_SEG6 	PORTC
+#define PIN_SEG6  	PINC
+#define SEG6_IDX  	6
+
+#define DDR_SEG5  	DDRC
+#define PORT_SEG5 	PORTC
+#define PIN_SEG5  	PINC
+#define SEG5_IDX  	7
+
+#define DDR_ICP/SEG22  	DDRD
+#define PORT_ICP/SEG22 	PORTD
+#define PIN_ICP/SEG22  	PIND
+#define ICP/SEG22_IDX  	0
+
+#define DDR_INT0/SEG21  	DDRD
+#define PORT_INT0/SEG21 	PORTD
+#define PIN_INT0/SEG21  	PIND
+#define INT0/SEG21_IDX  	1
+
+#define DDR_SEG20  	DDRD
+#define PORT_SEG20 	PORTD
+#define PIN_SEG20  	PIND
+#define SEG20_IDX  	2
+
+#define DDR_SEG19  	DDRD
+#define PORT_SEG19 	PORTD
+#define PIN_SEG19  	PIND
+#define SEG19_IDX  	3
+
+#define DDR_SEG18  	DDRD
+#define PORT_SEG18 	PORTD
+#define PIN_SEG18  	PIND
+#define SEG18_IDX  	4
+
+#define DDR_SEG17  	DDRD
+#define PORT_SEG17 	PORTD
+#define PIN_SEG17  	PIND
+#define SEG17_IDX  	5
+
+#define DDR_SEG16  	DDRD
+#define PORT_SEG16 	PORTD
+#define PIN_SEG16  	PIND
+#define SEG16_IDX  	6
+
+#define DDR_SEG15  	DDRD
+#define PORT_SEG15 	PORTD
+#define PIN_SEG15  	PIND
+#define SEG15_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_SEG14  	DDRG
+#define PORT_SEG14 	PORTG
+#define PIN_SEG14  	PING
+#define SEG14_IDX  	0
+
+#define DDR_SEG13  	DDRG
+#define PORT_SEG13 	PORTG
+#define PIN_SEG13  	PING
+#define SEG13_IDX  	1
+
+#define DDR_SEG4  	DDRG
+#define PORT_SEG4 	PORTG
+#define PIN_SEG4  	PING
+#define SEG4_IDX  	2
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_SEG24  	DDRG
+#define PORT_SEG24 	PORTG
+#define PIN_SEG24  	PING
+#define SEG24_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_SEG23  	DDRG
+#define PORT_SEG23 	PORTG
+#define PIN_SEG23  	PING
+#define SEG23_IDX  	4
+
+
 #endif  /* _AVR_IOM169_H_ */
Index: include/avr/iom64.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom64.h,v
retrieving revision 1.19
diff -u -r1.19 iom64.h
--- include/avr/iom64.h	17 Oct 2008 23:22:43 -0000	1.19
+++ include/avr/iom64.h	26 Mar 2009 20:10:32 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Steinar Haugen
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -361,138 +362,172 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 #define SIG_INTERRUPT3			_VECTOR(4)
 
 /* External Interrupt Request 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 #define SIG_INTERRUPT4			_VECTOR(5)
 
 /* External Interrupt Request 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 #define SIG_INTERRUPT5			_VECTOR(6)
 
 /* External Interrupt Request 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 #define SIG_INTERRUPT6			_VECTOR(7)
 
 /* External Interrupt Request 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 #define SIG_INTERRUPT7			_VECTOR(8)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		9
 #define TIMER2_COMP_vect		_VECTOR(9)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(9)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			10
 #define TIMER2_OVF_vect			_VECTOR(10)
 #define SIG_OVERFLOW2			_VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		11
 #define TIMER1_CAPT_vect		_VECTOR(11)
 #define SIG_INPUT_CAPTURE1		_VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		12
 #define TIMER1_COMPA_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(12)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		13
 #define TIMER1_COMPB_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(13)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			14
 #define TIMER1_OVF_vect			_VECTOR(14)
 #define SIG_OVERFLOW1			_VECTOR(14)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		15
 #define TIMER0_COMP_vect		_VECTOR(15)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(15)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			16
 #define TIMER0_OVF_vect			_VECTOR(16)
 #define SIG_OVERFLOW0			_VECTOR(16)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			17
 #define SPI_STC_vect			_VECTOR(17)
 #define SIG_SPI				_VECTOR(17)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			18
 #define USART0_RX_vect			_VECTOR(18)
 #define SIG_UART0_RECV			_VECTOR(18)
 
 /* USART0 Data Register Empty */
+#define USART0_UDRE_num 		19
 #define USART0_UDRE_vect		_VECTOR(19)
 #define SIG_UART0_DATA			_VECTOR(19)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			20
 #define USART0_TX_vect			_VECTOR(20)
 #define SIG_UART0_TRANS			_VECTOR(20)
 
 /* ADC Conversion Complete */
+#define ADC_num 			21
 #define ADC_vect			_VECTOR(21)
 #define SIG_ADC				_VECTOR(21)
 
 /* EEPROM Ready */
+#define EE_READY_num 			22
 #define EE_READY_vect			_VECTOR(22)
 #define SIG_EEPROM_READY		_VECTOR(22)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		23
 #define ANALOG_COMP_vect		_VECTOR(23)
 #define SIG_COMPARATOR			_VECTOR(23)
 
 /* Timer/Counter1 Compare Match C */
+#define TIMER1_COMPC_num 		24
 #define TIMER1_COMPC_vect		_VECTOR(24)
 #define SIG_OUTPUT_COMPARE1C		_VECTOR(24)
 
 /* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_num 		25
 #define TIMER3_CAPT_vect		_VECTOR(25)
 #define SIG_INPUT_CAPTURE3		_VECTOR(25)
 
 /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_num 		26
 #define TIMER3_COMPA_vect		_VECTOR(26)
 #define SIG_OUTPUT_COMPARE3A		_VECTOR(26)
 
 /* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_num 		27
 #define TIMER3_COMPB_vect		_VECTOR(27)
 #define SIG_OUTPUT_COMPARE3B		_VECTOR(27)
 
 /* Timer/Counter3 Compare Match C */
+#define TIMER3_COMPC_num 		28
 #define TIMER3_COMPC_vect		_VECTOR(28)
 #define SIG_OUTPUT_COMPARE3C		_VECTOR(28)
 
 /* Timer/Counter3 Overflow */
+#define TIMER3_OVF_num 			29
 #define TIMER3_OVF_vect			_VECTOR(29)
 #define SIG_OVERFLOW3			_VECTOR(29)
 
 /* USART1, Rx Complete */
+#define USART1_RX_num 			30
 #define USART1_RX_vect			_VECTOR(30)
 #define SIG_UART1_RECV			_VECTOR(30)
 
 /* USART1, Data Register Empty */
+#define USART1_UDRE_num 		31
 #define USART1_UDRE_vect		_VECTOR(31)
 #define SIG_UART1_DATA			_VECTOR(31)
 
 /* USART1, Tx Complete */
+#define USART1_TX_num 			32
 #define USART1_TX_vect			_VECTOR(32)
 #define SIG_UART1_TRANS			_VECTOR(32)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			33
 #define TWI_vect			_VECTOR(33)
 #define SIG_2WIRE_SERIAL		_VECTOR(33)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			34
 #define SPM_READY_vect			_VECTOR(34)
 #define SIG_SPM_READY			_VECTOR(34)
 
@@ -1224,4 +1259,326 @@
 #define SIGNATURE_2 0x02
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PWM1A  	DDRB
+#define PORT_PWM1A 	PORTB
+#define PIN_PWM1A  	PINB
+#define PWM1A_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PWM1B  	DDRB
+#define PORT_PWM1B 	PORTB
+#define PIN_PWM1B  	PINB
+#define PWM1B_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_OC1C  	DDRB
+#define PORT_OC1C 	PORTB
+#define PIN_OC1C  	PINB
+#define OC1C_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_SCL  	DDRD
+#define PORT_SCL 	PORTD
+#define PIN_SCL  	PIND
+#define SCL_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	0
+
+#define DDR_SDA  	DDRD
+#define PORT_SDA 	PORTD
+#define PIN_SDA  	PIND
+#define SDA_IDX  	1
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	1
+
+#define DDR_RXD1  	DDRD
+#define PORT_RXD1 	PORTD
+#define PIN_RXD1  	PIND
+#define RXD1_IDX  	2
+
+#define DDR_INT2  	DDRD
+#define PORT_INT2 	PORTD
+#define PIN_INT2  	PIND
+#define INT2_IDX  	2
+
+#define DDR_TXD1  	DDRD
+#define PORT_TXD1 	PORTD
+#define PIN_TXD1  	PIND
+#define TXD1_IDX  	3
+
+#define DDR_INT3  	DDRD
+#define PORT_INT3 	PORTD
+#define PIN_INT3  	PIND
+#define INT3_IDX  	3
+
+#define DDR_IC1  	DDRD
+#define PORT_IC1 	PORTD
+#define PIN_IC1  	PIND
+#define IC1_IDX  	4
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	5
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	6
+
+#define DDR_T2  	DDRD
+#define PORT_T2 	PORTD
+#define PIN_T2  	PIND
+#define T2_IDX  	7
+
+#define DDR_RXD0  	DDRE
+#define PORT_RXD0 	PORTE
+#define PIN_RXD0  	PINE
+#define RXD0_IDX  	0
+
+#define DDR_TXD0  	DDRE
+#define PORT_TXD0 	PORTE
+#define PIN_TXD0  	PINE
+#define TXD0_IDX  	1
+
+#define DDR_XCK0  	DDRE
+#define PORT_XCK0 	PORTE
+#define PIN_XCK0  	PINE
+#define XCK0_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_OC3A  	DDRE
+#define PORT_OC3A 	PORTE
+#define PIN_OC3A  	PINE
+#define OC3A_IDX  	3
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_OC3B  	DDRE
+#define PORT_OC3B 	PORTE
+#define PIN_OC3B  	PINE
+#define OC3B_IDX  	4
+
+#define DDR_INT4  	DDRE
+#define PORT_INT4 	PORTE
+#define PIN_INT4  	PINE
+#define INT4_IDX  	4
+
+#define DDR_OC3C  	DDRE
+#define PORT_OC3C 	PORTE
+#define PIN_OC3C  	PINE
+#define OC3C_IDX  	5
+
+#define DDR_INT5  	DDRE
+#define PORT_INT5 	PORTE
+#define PIN_INT5  	PINE
+#define INT5_IDX  	5
+
+#define DDR_T3  	DDRE
+#define PORT_T3 	PORTE
+#define PIN_T3  	PINE
+#define T3_IDX  	6
+
+#define DDR_INT6  	DDRE
+#define PORT_INT6 	PORTE
+#define PIN_INT6  	PINE
+#define INT6_IDX  	6
+
+#define DDR_IC3  	DDRE
+#define PORT_IC3 	PORTE
+#define PIN_IC3  	PINE
+#define IC3_IDX  	7
+
+#define DDR_INT7  	DDRE
+#define PORT_INT7 	PORTE
+#define PIN_INT7  	PINE
+#define INT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_WR  	DDRG
+#define PORT_WR 	PORTG
+#define PIN_WR  	PING
+#define WR_IDX  	0
+
+#define DDR_RD  	DDRG
+#define PORT_RD 	PORTG
+#define PIN_RD  	PING
+#define RD_IDX  	1
+
+#define DDR_ALE  	DDRG
+#define PORT_ALE 	PORTG
+#define PIN_ALE  	PING
+#define ALE_IDX  	2
+
+
 #endif /* _AVR_IOM64_H_ */
Index: include/avr/iom329.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom329.h,v
retrieving revision 1.14
diff -u -r1.14 iom329.h
--- include/avr/iom329.h	11 Feb 2009 17:53:36 -0000	1.14
+++ include/avr/iom329.h	26 Mar 2009 20:10:30 -0000
@@ -1,5 +1,6 @@
 /* Copyright (c) 2004 Eric B. Weddington
    Copyright (c) 2005, 2006, 2007 Anatoly Sokolov 
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -856,90 +857,112 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				_VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
 /* LCD Start of Frame */
+#define LCD_num 			22
 #define LCD_vect			_VECTOR(22)
 #define SIG_LCD				_VECTOR(22)
 
@@ -1000,4 +1023,371 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_COM0  	DDRA
+#define PORT_COM0 	PORTA
+#define PIN_COM0  	PINA
+#define COM0_IDX  	0
+
+#define DDR_COM1  	DDRA
+#define PORT_COM1 	PORTA
+#define PIN_COM1  	PINA
+#define COM1_IDX  	1
+
+#define DDR_COM2  	DDRA
+#define PORT_COM2 	PORTA
+#define PIN_COM2  	PINA
+#define COM2_IDX  	2
+
+#define DDR_COM3  	DDRA
+#define PORT_COM3 	PORTA
+#define PIN_COM3  	PINA
+#define COM3_IDX  	3
+
+#define DDR_SEG0  	DDRA
+#define PORT_SEG0 	PORTA
+#define PIN_SEG0  	PINA
+#define SEG0_IDX  	4
+
+#define DDR_SEG1  	DDRA
+#define PORT_SEG1 	PORTA
+#define PIN_SEG1  	PINA
+#define SEG1_IDX  	5
+
+#define DDR_SEG2  	DDRA
+#define PORT_SEG2 	PORTA
+#define PIN_SEG2  	PINA
+#define SEG2_IDX  	6
+
+#define DDR_SEG3  	DDRA
+#define PORT_SEG3 	PORTA
+#define PIN_SEG3  	PINA
+#define SEG3_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_SEG12  	DDRC
+#define PORT_SEG12 	PORTC
+#define PIN_SEG12  	PINC
+#define SEG12_IDX  	0
+
+#define DDR_SEG11  	DDRC
+#define PORT_SEG11 	PORTC
+#define PIN_SEG11  	PINC
+#define SEG11_IDX  	1
+
+#define DDR_SEG10  	DDRC
+#define PORT_SEG10 	PORTC
+#define PIN_SEG10  	PINC
+#define SEG10_IDX  	2
+
+#define DDR_SEG9  	DDRC
+#define PORT_SEG9 	PORTC
+#define PIN_SEG9  	PINC
+#define SEG9_IDX  	3
+
+#define DDR_SEG8  	DDRC
+#define PORT_SEG8 	PORTC
+#define PIN_SEG8  	PINC
+#define SEG8_IDX  	4
+
+#define DDR_SEG7  	DDRC
+#define PORT_SEG7 	PORTC
+#define PIN_SEG7  	PINC
+#define SEG7_IDX  	5
+
+#define DDR_SEG6  	DDRC
+#define PORT_SEG6 	PORTC
+#define PIN_SEG6  	PINC
+#define SEG6_IDX  	6
+
+#define DDR_SEG5  	DDRC
+#define PORT_SEG5 	PORTC
+#define PIN_SEG5  	PINC
+#define SEG5_IDX  	7
+
+#define DDR_ICP/SEG22  	DDRD
+#define PORT_ICP/SEG22 	PORTD
+#define PIN_ICP/SEG22  	PIND
+#define ICP/SEG22_IDX  	0
+
+#define DDR_INT0/SEG21  	DDRD
+#define PORT_INT0/SEG21 	PORTD
+#define PIN_INT0/SEG21  	PIND
+#define INT0/SEG21_IDX  	1
+
+#define DDR_SEG20  	DDRD
+#define PORT_SEG20 	PORTD
+#define PIN_SEG20  	PIND
+#define SEG20_IDX  	2
+
+#define DDR_SEG19  	DDRD
+#define PORT_SEG19 	PORTD
+#define PIN_SEG19  	PIND
+#define SEG19_IDX  	3
+
+#define DDR_SEG18  	DDRD
+#define PORT_SEG18 	PORTD
+#define PIN_SEG18  	PIND
+#define SEG18_IDX  	4
+
+#define DDR_SEG17  	DDRD
+#define PORT_SEG17 	PORTD
+#define PIN_SEG17  	PIND
+#define SEG17_IDX  	5
+
+#define DDR_SEG16  	DDRD
+#define PORT_SEG16 	PORTD
+#define PIN_SEG16  	PIND
+#define SEG16_IDX  	6
+
+#define DDR_SEG15  	DDRD
+#define PORT_SEG15 	PORTD
+#define PIN_SEG15  	PIND
+#define SEG15_IDX  	7
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_SEG14  	DDRG
+#define PORT_SEG14 	PORTG
+#define PIN_SEG14  	PING
+#define SEG14_IDX  	0
+
+#define DDR_SEG13  	DDRG
+#define PORT_SEG13 	PORTG
+#define PIN_SEG13  	PING
+#define SEG13_IDX  	1
+
+#define DDR_SEG4  	DDRG
+#define PORT_SEG4 	PORTG
+#define PIN_SEG4  	PING
+#define SEG4_IDX  	2
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_SEG24  	DDRG
+#define PORT_SEG24 	PORTG
+#define PIN_SEG24  	PING
+#define SEG24_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+#define DDR_SEG23  	DDRG
+#define PORT_SEG23 	PORTG
+#define PIN_SEG23  	PING
+#define SEG23_IDX  	4
+
+
 #endif /* _AVR_IOM329_H_ */
Index: include/avr/io4433.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/io4433.h,v
retrieving revision 1.13
diff -u -r1.13 io4433.h
--- include/avr/io4433.h	11 Feb 2009 17:53:34 -0000	1.13
+++ include/avr/io4433.h	26 Mar 2009 20:10:21 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -180,54 +181,67 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Timer/Counter Capture Event */
+#define TIMER1_CAPT_num 		3
 #define TIMER1_CAPT_vect		_VECTOR(3)
 #define SIG_INPUT_CAPTURE1		_VECTOR(3)
 
 /* Timer/Counter1 Compare Match */
+#define TIMER1_COMP_num 		4
 #define TIMER1_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(4)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			5
 #define TIMER1_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW1			_VECTOR(5)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			6
 #define TIMER0_OVF_vect			_VECTOR(6)
 #define SIG_OVERFLOW0			_VECTOR(6)
 
 /* Serial Transfer Complete */
+#define SPI_STC_num 			7
 #define SPI_STC_vect			_VECTOR(7)
 #define SIG_SPI				_VECTOR(7)
 
 /* UART, Rx Complete */
+#define UART_RX_num 			8
 #define UART_RX_vect			_VECTOR(8)
 #define SIG_UART_RECV			_VECTOR(8)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			9
 #define UART_UDRE_vect			_VECTOR(9)
 #define SIG_UART_DATA			_VECTOR(9)
 
 /* UART, Tx Complete */
+#define UART_TX_num 			10
 #define UART_TX_vect			_VECTOR(10)
 #define SIG_UART_TRANS			_VECTOR(10)
 
 /* ADC Conversion Complete */
+#define ADC_num 			11
 #define ADC_vect			_VECTOR(11)
 #define SIG_ADC				_VECTOR(11)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			12
 #define EE_RDY_vect			_VECTOR(12)
 #define SIG_EEPROM_READY		_VECTOR(12)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			13
 #define ANA_COMP_vect			_VECTOR(13)
 #define SIG_COMPARATOR			_VECTOR(13)
 
@@ -470,4 +484,106 @@
 #define SIGNATURE_2 0x03
 
 
+/* Device Pin Definitions */
+#define DDR_ICP  	DDRB
+#define PORT_ICP 	PORTB
+#define PIN_ICP  	PINB
+#define ICP_IDX  	0
+
+#define DDR_OC1  	DDRB
+#define PORT_OC1 	PORTB
+#define PIN_OC1  	PINB
+#define OC1_IDX  	1
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	2
+
+#define DDR_MOS1  	DDRB
+#define PORT_MOS1 	PORTB
+#define PIN_MOS1  	PINB
+#define MOS1_IDX  	3
+
+#define DDR_MOS0  	DDRB
+#define PORT_MOS0 	PORTB
+#define PIN_MOS0  	PINB
+#define MOS0_IDX  	4
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	5
+
+#define DDR_ADC0  	DDRC
+#define PORT_ADC0 	PORTC
+#define PIN_ADC0  	PINC
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRC
+#define PORT_ADC1 	PORTC
+#define PIN_ADC1  	PINC
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRC
+#define PORT_ADC2 	PORTC
+#define PIN_ADC2  	PINC
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRC
+#define PORT_ADC3 	PORTC
+#define PIN_ADC3  	PINC
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRC
+#define PORT_ADC4 	PORTC
+#define PIN_ADC4  	PINC
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRC
+#define PORT_ADC5 	PORTC
+#define PIN_ADC5  	PINC
+#define ADC5_IDX  	5
+
+#define DDR_RXD  	DDRD
+#define PORT_RXD 	PORTD
+#define PIN_RXD  	PIND
+#define RXD_IDX  	0
+
+#define DDR_TXD  	DDRD
+#define PORT_TXD 	PORTD
+#define PIN_TXD  	PIND
+#define TXD_IDX  	1
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	2
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	3
+
+#define DDR_T0  	DDRD
+#define PORT_T0 	PORTD
+#define PIN_T0  	PIND
+#define T0_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	5
+
+#define DDR_AIN0  	DDRD
+#define PORT_AIN0 	PORTD
+#define PIN_AIN0  	PIND
+#define AIN0_IDX  	6
+
+#define DDR_AIN1  	DDRD
+#define PORT_AIN1 	PORTD
+#define PIN_AIN1  	PIND
+#define AIN1_IDX  	7
+
+
 #endif /* _AVR_IO4433_H_ */
Index: include/avr/iotn43u.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn43u.h,v
retrieving revision 1.10
diff -u -r1.10 iotn43u.h
--- include/avr/iotn43u.h	11 Feb 2009 17:53:38 -0000	1.10
+++ include/avr/iotn43u.h	26 Mar 2009 20:10:36 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2007 Atmel Corporation
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -476,48 +477,63 @@
 /* Interrupt vector 0 is the reset vector. */
 
 /* External Interrupt Request 0 */
+#define INT0_num            1
 #define INT0_vect           _VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num          2
 #define PCINT0_vect         _VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num          3
 #define PCINT1_vect         _VECTOR(3)
 
 /* Watchdog Time-out */
+#define WDT_num             4
 #define WDT_vect            _VECTOR(4)
 
 /* Timer/Counter1 Compare Match A */
+#define TIM1_COMPA_num      5
 #define TIM1_COMPA_vect     _VECTOR(5)
 
 /* Timer/Counter1 Compare Match B */
+#define TIM1_COMPB_num      6
 #define TIM1_COMPB_vect     _VECTOR(6)
 
 /* Timer/Counter1 Overflow */
+#define TIM1_OVF_num        7
 #define TIM1_OVF_vect       _VECTOR(7)
 
 /* Timer/Counter0 Compare Match A */
+#define TIM0_COMPA_num      8
 #define TIM0_COMPA_vect     _VECTOR(8)
 
 /* Timer/Counter0 Compare Match B */
+#define TIM0_COMPB_num      9
 #define TIM0_COMPB_vect     _VECTOR(9)
 
 /* Timer/Counter0 Overflow */
+#define TIM0_OVF_num        10
 #define TIM0_OVF_vect       _VECTOR(10)
 
 /* Analog Comparator */
+#define ANA_COMP_num        11
 #define ANA_COMP_vect       _VECTOR(11)
 
 /* ADC Conversion Complete */
+#define ADC_num             12
 #define ADC_vect            _VECTOR(12)
 
 /* EEPROM Ready */
+#define EE_RDY_num          13
 #define EE_RDY_vect         _VECTOR(13)
 
 /* USI START */
+#define USI_START_num       14
 #define USI_START_vect      _VECTOR(14)
 
 /* USI Overflow */
+#define USI_OVF_num         15
 #define USI_OVF_vect        _VECTOR(15)
 
 #define _VECTORS_SIZE 32
@@ -572,4 +588,281 @@
 #define SIGNATURE_2 0x0C
 
 
+/* Device Pin Definitions */
+#define DDR_ADC0  	DDRA
+#define PORT_ADC0 	PORTA
+#define PIN_ADC0  	PINA
+#define ADC0_IDX  	0
+
+#define DDR_DI  	DDRA
+#define PORT_DI 	PORTA
+#define PIN_DI  	PINA
+#define DI_IDX  	0
+
+#define DDR_SDA  	DDRA
+#define PORT_SDA 	PORTA
+#define PIN_SDA  	PINA
+#define SDA_IDX  	0
+
+#define DDR_PCINT0  	DDRA
+#define PORT_PCINT0 	PORTA
+#define PIN_PCINT0  	PINA
+#define PCINT0_IDX  	0
+
+#define DDR_ADC1  	DDRA
+#define PORT_ADC1 	PORTA
+#define PIN_ADC1  	PINA
+#define ADC1_IDX  	1
+
+#define DDR_DO  	DDRA
+#define PORT_DO 	PORTA
+#define PIN_DO  	PINA
+#define DO_IDX  	1
+
+#define DDR_PCINT1  	DDRA
+#define PORT_PCINT1 	PORTA
+#define PIN_PCINT1  	PINA
+#define PCINT1_IDX  	1
+
+#define DDR_ADC2  	DDRA
+#define PORT_ADC2 	PORTA
+#define PIN_ADC2  	PINA
+#define ADC2_IDX  	2
+
+#define DDR_INT1  	DDRA
+#define PORT_INT1 	PORTA
+#define PIN_INT1  	PINA
+#define INT1_IDX  	2
+
+#define DDR_USCK  	DDRA
+#define PORT_USCK 	PORTA
+#define PIN_USCK  	PINA
+#define USCK_IDX  	2
+
+#define DDR_SCL  	DDRA
+#define PORT_SCL 	PORTA
+#define PIN_SCL  	PINA
+#define SCL_IDX  	2
+
+#define DDR_PCINT2  	DDRA
+#define PORT_PCINT2 	PORTA
+#define PIN_PCINT2  	PINA
+#define PCINT2_IDX  	2
+
+#define DDR_PCINT3  	DDRA
+#define PORT_PCINT3 	PORTA
+#define PIN_PCINT3  	PINA
+#define PCINT3_IDX  	3
+
+#define DDR_ADC3  	DDRA
+#define PORT_ADC3 	PORTA
+#define PIN_ADC3  	PINA
+#define ADC3_IDX  	4
+
+#define DDR_ICP0  	DDRA
+#define PORT_ICP0 	PORTA
+#define PIN_ICP0  	PINA
+#define ICP0_IDX  	4
+
+#define DDR_PCINT4  	DDRA
+#define PORT_PCINT4 	PORTA
+#define PIN_PCINT4  	PINA
+#define PCINT4_IDX  	4
+
+#define DDR_ADC4  	DDRA
+#define PORT_ADC4 	PORTA
+#define PIN_ADC4  	PINA
+#define ADC4_IDX  	5
+
+#define DDR_AIN2  	DDRA
+#define PORT_AIN2 	PORTA
+#define PIN_AIN2  	PINA
+#define AIN2_IDX  	5
+
+#define DDR_PCINT5  	DDRA
+#define PORT_PCINT5 	PORTA
+#define PIN_PCINT5  	PINA
+#define PCINT5_IDX  	5
+
+#define DDR_ADC5  	DDRA
+#define PORT_ADC5 	PORTA
+#define PIN_ADC5  	PINA
+#define ADC5_IDX  	6
+
+#define DDR_AIN0  	DDRA
+#define PORT_AIN0 	PORTA
+#define PIN_AIN0  	PINA
+#define AIN0_IDX  	6
+
+#define DDR_PCINT6  	DDRA
+#define PORT_PCINT6 	PORTA
+#define PIN_PCINT6  	PINA
+#define PCINT6_IDX  	6
+
+#define DDR_ADC6  	DDRA
+#define PORT_ADC6 	PORTA
+#define PIN_ADC6  	PINA
+#define ADC6_IDX  	7
+
+#define DDR_AIN1  	DDRA
+#define PORT_AIN1 	PORTA
+#define PIN_AIN1  	PINA
+#define AIN1_IDX  	7
+
+#define DDR_PCINT7  	DDRA
+#define PORT_PCINT7 	PORTA
+#define PIN_PCINT7  	PINA
+#define PCINT7_IDX  	7
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_DI  	DDRB
+#define PORT_DI 	PORTB
+#define PIN_DI  	PINB
+#define DI_IDX  	0
+
+#define DDR_SDA  	DDRB
+#define PORT_SDA 	PORTB
+#define PIN_SDA  	PINB
+#define SDA_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_DO  	DDRB
+#define PORT_DO 	PORTB
+#define PIN_DO  	PINB
+#define DO_IDX  	1
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_USCK  	DDRB
+#define PORT_USCK 	PORTB
+#define PIN_USCK  	PINB
+#define USCK_IDX  	2
+
+#define DDR_SCL  	DDRB
+#define PORT_SCL 	PORTB
+#define PIN_SCL  	PINB
+#define SCL_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_ADC7  	DDRB
+#define PORT_ADC7 	PORTB
+#define PIN_ADC7  	PINB
+#define ADC7_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1D  	DDRB
+#define PORT_OC1D 	PORTB
+#define PIN_OC1D  	PINB
+#define OC1D_IDX  	4
+
+#define DDR_CLKI  	DDRB
+#define PORT_CLKI 	PORTB
+#define PIN_CLKI  	PINB
+#define CLKI_IDX  	4
+
+#define DDR_ADC8  	DDRB
+#define PORT_ADC8 	PORTB
+#define PIN_ADC8  	PINB
+#define ADC8_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1D  	DDRB
+#define PORT_OC1D 	PORTB
+#define PIN_OC1D  	PINB
+#define OC1D_IDX  	5
+
+#define DDR_CKLO  	DDRB
+#define PORT_CKLO 	PORTB
+#define PIN_CKLO  	PINB
+#define CKLO_IDX  	5
+
+#define DDR_ADC9  	DDRB
+#define PORT_ADC9 	PORTB
+#define PIN_ADC9  	PINB
+#define ADC9_IDX  	6
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	6
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_ADC10  	DDRB
+#define PORT_ADC10 	PORTB
+#define PIN_ADC10  	PINB
+#define ADC10_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+
 #endif /* _AVR_IOTN43U_H_ */
Index: include/avr/iotn28.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn28.h,v
retrieving revision 1.14
diff -u -r1.14 iotn28.h
--- include/avr/iotn28.h	17 Oct 2008 23:22:45 -0000	1.14
+++ include/avr/iotn28.h	26 Mar 2009 20:10:36 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -92,22 +93,27 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* Low-level Input on Port B */
+#define LOWLEVEL_IO_PINS_num 		3
 #define LOWLEVEL_IO_PINS_vect		_VECTOR(3)
 #define SIG_PIN				_VECTOR(3)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			4
 #define TIMER0_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW0			_VECTOR(4)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			5
 #define ANA_COMP_vect			_VECTOR(5)
 #define SIG_COMPARATOR			_VECTOR(5)
 
@@ -272,4 +278,36 @@
 #define SIGNATURE_2 0x07
 
 
+/* Device Pin Definitions */
+#define DDR_IR  	DDRA
+#define PORT_IR 	PORTA
+#define PIN_IR  	PINA
+#define IR_IDX  	2
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	3
+
+#define DDR_INT1  	DDRB
+#define PORT_INT1 	PORTB
+#define PIN_INT1  	PINB
+#define INT1_IDX  	4
+
+
 #endif /* _AVR_IOTN28_H_ */
Index: include/avr/iom103.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom103.h,v
retrieving revision 1.12
diff -u -r1.12 iom103.h
--- include/avr/iom103.h	13 Aug 2008 23:29:50 -0000	1.12
+++ include/avr/iom103.h	26 Mar 2009 20:10:25 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2002, Marek Michalkiewicz
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -224,94 +225,117 @@
 /* Interrupt vectors */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* External Interrupt 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 #define SIG_INTERRUPT3			_VECTOR(4)
 
 /* External Interrupt 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 #define SIG_INTERRUPT4			_VECTOR(5)
 
 /* External Interrupt 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 #define SIG_INTERRUPT5			_VECTOR(6)
 
 /* External Interrupt 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 #define SIG_INTERRUPT6			_VECTOR(7)
 
 /* External Interrupt 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 #define SIG_INTERRUPT7			_VECTOR(8)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		9
 #define TIMER2_COMP_vect		_VECTOR(9)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(9)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			10
 #define TIMER2_OVF_vect			_VECTOR(10)
 #define SIG_OVERFLOW2			_VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		11
 #define TIMER1_CAPT_vect		_VECTOR(11)
 #define SIG_INPUT_CAPTURE1		_VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		12
 #define TIMER1_COMPA_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(12)
 
 /* Timer/Counter1 Compare Match B */
+#define TIMER1_COMPB_num 		13
 #define TIMER1_COMPB_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(13)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			14
 #define TIMER1_OVF_vect			_VECTOR(14)
 #define SIG_OVERFLOW1			_VECTOR(14)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		15
 #define TIMER0_COMP_vect		_VECTOR(15)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(15)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			16
 #define TIMER0_OVF_vect			_VECTOR(16)
 #define SIG_OVERFLOW0			_VECTOR(16)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			17
 #define SPI_STC_vect			_VECTOR(17)
 #define SIG_SPI				_VECTOR(17)
 
 /* UART, Rx Complete */
+#define UART_RX_num 			18
 #define UART_RX_vect			_VECTOR(18)
 #define SIG_UART_RECV			_VECTOR(18)
 
 /* UART Data Register Empty */
+#define UART_UDRE_num 			19
 #define UART_UDRE_vect			_VECTOR(19)
 #define SIG_UART_DATA			_VECTOR(19)
 
 /* UART, Tx Complete */
+#define UART_TX_num 			20
 #define UART_TX_vect			_VECTOR(20)
 #define SIG_UART_TRANS			_VECTOR(20)
 
 /* ADC Conversion Complete */
+#define ADC_num 			21
 #define ADC_vect			_VECTOR(21)
 #define SIG_ADC				_VECTOR(21)
 
 /* EEPROM Ready */
+#define EE_READY_num 			22
 #define EE_READY_vect			_VECTOR(22)
 #define SIG_EEPROM_READY		_VECTOR(22)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		23
 #define ANALOG_COMP_vect		_VECTOR(23)
 #define SIG_COMPARATOR			_VECTOR(23)
 
@@ -672,4 +696,256 @@
 #define SIGNATURE_2 0x01
 
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_OC0  	DDRB
+#define PORT_OC0 	PORTB
+#define PIN_OC0  	PINB
+#define OC0_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PWM1A  	DDRB
+#define PORT_PWM1A 	PORTB
+#define PIN_PWM1A  	PINB
+#define PWM1A_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PWM1B  	DDRB
+#define PORT_PWM1B 	PORTB
+#define PIN_PWM1B  	PINB
+#define PWM1B_IDX  	6
+
+#define DDR_OC2  	DDRB
+#define PORT_OC2 	PORTB
+#define PIN_OC2  	PINB
+#define OC2_IDX  	7
+
+#define DDR_OC1C  	DDRB
+#define PORT_OC1C 	PORTB
+#define PIN_OC1C  	PINB
+#define OC1C_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	0
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	1
+
+#define DDR_INT2  	DDRD
+#define PORT_INT2 	PORTD
+#define PIN_INT2  	PIND
+#define INT2_IDX  	2
+
+#define DDR_INT3  	DDRD
+#define PORT_INT3 	PORTD
+#define PIN_INT3  	PIND
+#define INT3_IDX  	3
+
+#define DDR_IC1  	DDRD
+#define PORT_IC1 	PORTD
+#define PIN_IC1  	PIND
+#define IC1_IDX  	4
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	6
+
+#define DDR_T2  	DDRD
+#define PORT_T2 	PORTD
+#define PIN_T2  	PIND
+#define T2_IDX  	7
+
+#define DDR_RXD0  	DDRE
+#define PORT_RXD0 	PORTE
+#define PIN_RXD0  	PINE
+#define RXD0_IDX  	0
+
+#define DDR_TXD0  	DDRE
+#define PORT_TXD0 	PORTE
+#define PIN_TXD0  	PINE
+#define TXD0_IDX  	1
+
+#define DDR_AC_P  	DDRE
+#define PORT_AC_P 	PORTE
+#define PIN_AC_P  	PINE
+#define AC_P_IDX  	2
+
+#define DDR_AC_N  	DDRE
+#define PORT_AC_N 	PORTE
+#define PIN_AC_N  	PINE
+#define AC_N_IDX  	3
+
+#define DDR_INT4  	DDRE
+#define PORT_INT4 	PORTE
+#define PIN_INT4  	PINE
+#define INT4_IDX  	4
+
+#define DDR_INT5  	DDRE
+#define PORT_INT5 	PORTE
+#define PIN_INT5  	PINE
+#define INT5_IDX  	5
+
+#define DDR_INT6  	DDRE
+#define PORT_INT6 	PORTE
+#define PIN_INT6  	PINE
+#define INT6_IDX  	6
+
+#define DDR_INT7  	DDRE
+#define PORT_INT7 	PORTE
+#define PIN_INT7  	PINE
+#define INT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+
 #endif /* _AVR_IOM103_H_ */
Index: include/avr/iotnx5.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotnx5.h,v
retrieving revision 1.9
diff -u -r1.9 iotnx5.h
--- include/avr/iotnx5.h	7 Feb 2009 19:24:23 -0000	1.9
+++ include/avr/iotnx5.h	26 Mar 2009 20:10:37 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2005,2007 Anatoly Sokolov
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -350,67 +351,234 @@
 /* Interrupt vectors */
 /* Interrupt vector 0 is the reset vector. */
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE			_VECTOR(2)
 
 /* Timer/Counter1 Compare Match 1A */
+#define TIM1_COMPA_num 			3
 #define TIM1_COMPA_vect			_VECTOR(3)
+#define TIMER1_COMPA_num 		3
 #define TIMER1_COMPA_vect		_VECTOR(3)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(3)
 
 /* Timer/Counter1 Overflow */
+#define TIM1_OVF_num 			4
 #define TIM1_OVF_vect			_VECTOR(4)
+#define TIMER1_OVF_num 			4
 #define TIMER1_OVF_vect			_VECTOR(4)
 #define SIG_OVERFLOW1			_VECTOR(4)
 
 /* Timer/Counter0 Overflow */
+#define TIM0_OVF_num 			5
 #define TIM0_OVF_vect			_VECTOR(5)
+#define TIMER0_OVF_num 			5
 #define TIMER0_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW0			_VECTOR(5)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			6
 #define EE_RDY_vect			_VECTOR(6)
 #define SIG_EEPROM_READY		_VECTOR(6)
 
 /* Analog comparator */
+#define ANA_COMP_num 			7
 #define ANA_COMP_vect			_VECTOR(7)
 #define SIG_COMPARATOR			_VECTOR(7)
 
 /* ADC Conversion ready */
+#define ADC_num 			8
 #define ADC_vect			_VECTOR(8)
 #define SIG_ADC				_VECTOR(8)
 
 /* Timer/Counter1 Compare Match B */
+#define TIM1_COMPB_num 			9
 #define TIM1_COMPB_vect			_VECTOR(9)
+#define TIMER1_COMPB_num 		9
 #define TIMER1_COMPB_vect		_VECTOR(9)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(9)
 
 /* Timer/Counter0 Compare Match A */
+#define TIM0_COMPA_num 			10
 #define TIM0_COMPA_vect			_VECTOR(10)
+#define TIMER0_COMPA_num 		10
 #define TIMER0_COMPA_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(10)
 
 /* Timer/Counter0 Compare Match B */
+#define TIM0_COMPB_num 			11
 #define TIM0_COMPB_vect			_VECTOR(11)
+#define TIMER0_COMPB_num 		11
 #define TIMER0_COMPB_vect		_VECTOR(11)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(11)
 
 /* Watchdog Time-out */
+#define WDT_num 			12
 #define WDT_vect			_VECTOR(12)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(12)
 
 /* USI START */
+#define USI_START_num 			13
 #define USI_START_vect			_VECTOR(13)
 #define SIG_USI_START			_VECTOR(13)
 
 /* USI Overflow */
+#define USI_OVF_num 			14
 #define USI_OVF_vect			_VECTOR(14)
 #define SIG_USI_OVERFLOW		_VECTOR(14)
 
 #define _VECTORS_SIZE 30
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_DI  	DDRB
+#define PORT_DI 	PORTB
+#define PIN_DI  	PINB
+#define DI_IDX  	0
+
+#define DDR_SDA  	DDRB
+#define PORT_SDA 	PORTB
+#define PIN_SDA  	PINB
+#define SDA_IDX  	0
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	0
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_DO  	DDRB
+#define PORT_DO 	PORTB
+#define PIN_DO  	PINB
+#define DO_IDX  	1
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_OC0B  	DDRB
+#define PORT_OC0B 	PORTB
+#define PIN_OC0B  	PINB
+#define OC0B_IDX  	1
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_USCK  	DDRB
+#define PORT_USCK 	PORTB
+#define PIN_USCK  	PINB
+#define USCK_IDX  	2
+
+#define DDR_SCL  	DDRB
+#define PORT_SCL 	PORTB
+#define PIN_SCL  	PINB
+#define SCL_IDX  	2
+
+#define DDR_ADC1  	DDRB
+#define PORT_ADC1 	PORTB
+#define PIN_ADC1  	PINB
+#define ADC1_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_ADC3  	DDRB
+#define PORT_ADC3 	PORTB
+#define PIN_ADC3  	PINB
+#define ADC3_IDX  	3
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	3
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	3
+
+#define DDR_ADC2  	DDRB
+#define PORT_ADC2 	PORTB
+#define PIN_ADC2  	PINB
+#define ADC2_IDX  	4
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	4
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	4
+
+#define DDR_ADC0  	DDRB
+#define PORT_ADC0 	PORTB
+#define PIN_ADC0  	PINB
+#define ADC0_IDX  	5
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_dW  	DDRB
+#define PORT_dW 	PORTB
+#define PIN_dW  	PINB
+#define dW_IDX  	5
+
+
 #endif /* _AVR_IOTNX5_H_ */
Index: include/avr/iocanxx.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iocanxx.h,v
retrieving revision 1.7
diff -u -r1.7 iocanxx.h
--- include/avr/iocanxx.h	25 Oct 2007 20:33:23 -0000	1.7
+++ include/avr/iocanxx.h	26 Mar 2009 20:10:24 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004,2005,2006 Colin O'Flynn <coflynn@newae.com>
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -465,152 +466,188 @@
 /* Interrupt vectors */
 
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 1 */
+#define INT1_num 			2
 #define INT1_vect			_VECTOR(2)
 #define SIG_INTERRUPT1			_VECTOR(2)
 
 /* External Interrupt Request 2 */
+#define INT2_num 			3
 #define INT2_vect			_VECTOR(3)
 #define SIG_INTERRUPT2			_VECTOR(3)
 
 /* External Interrupt Request 3 */
+#define INT3_num 			4
 #define INT3_vect			_VECTOR(4)
 #define SIG_INTERRUPT3			_VECTOR(4)
 
 /* External Interrupt Request 4 */
+#define INT4_num 			5
 #define INT4_vect			_VECTOR(5)
 #define SIG_INTERRUPT4			_VECTOR(5)
 
 /* External Interrupt Request 5 */
+#define INT5_num 			6
 #define INT5_vect			_VECTOR(6)
 #define SIG_INTERRUPT5			_VECTOR(6)
 
 /* External Interrupt Request 6 */
+#define INT6_num 			7
 #define INT6_vect			_VECTOR(7)
 #define SIG_INTERRUPT6			_VECTOR(7)
 
 /* External Interrupt Request 7 */
+#define INT7_num 			8
 #define INT7_vect			_VECTOR(8)
 #define SIG_INTERRUPT7			_VECTOR(8)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		9
 #define TIMER2_COMP_vect		_VECTOR(9)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(9)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			10
 #define TIMER2_OVF_vect			_VECTOR(10)
 #define SIG_OVERFLOW2			_VECTOR(10)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		11
 #define TIMER1_CAPT_vect		_VECTOR(11)
 #define SIG_INPUT_CAPTURE1		_VECTOR(11)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		12
 #define TIMER1_COMPA_vect		_VECTOR(12)
 #define SIG_OUTPUT_COMPARE1A		_VECTOR(12)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		13
 #define TIMER1_COMPB_vect		_VECTOR(13)
 #define SIG_OUTPUT_COMPARE1B		_VECTOR(13)
 
 /* Timer/Counter1 Compare Match C */
+#define TIMER1_COMPC_num 		14
 #define TIMER1_COMPC_vect		_VECTOR(14)
 #define SIG_OUTPUT_COMPARE1C		_VECTOR(14)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			15
 #define TIMER1_OVF_vect			_VECTOR(15)
 #define SIG_OVERFLOW1			_VECTOR(15)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		16
 #define TIMER0_COMP_vect		_VECTOR(16)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(16)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			17
 #define TIMER0_OVF_vect			_VECTOR(17)
 #define SIG_OVERFLOW0			_VECTOR(17)
 
 /* CAN Transfer Complete or Error */
+#define CANIT_num 			18
 #define CANIT_vect			_VECTOR(18)
 #define SIG_CAN_INTERRUPT1		_VECTOR(18)
 
 /* CAN Timer Overrun */
+#define OVRIT_num 			19
 #define OVRIT_vect			_VECTOR(19)
 #define SIG_CAN_OVERFLOW1		_VECTOR(19)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			20
 #define SPI_STC_vect			_VECTOR(20)
 #define SIG_SPI				_VECTOR(20)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			21
 #define USART0_RX_vect			_VECTOR(21)
 #define SIG_UART0_RECV			_VECTOR(21)
 #define SIG_USART0_RECV			_VECTOR(21)
 
 /* USART0 Data Register Empty */
+#define USART0_UDRE_num 		22
 #define USART0_UDRE_vect		_VECTOR(22)
 #define SIG_UART0_DATA			_VECTOR(22)
 #define SIG_USART0_DATA			_VECTOR(22)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			23
 #define USART0_TX_vect			_VECTOR(23)
 #define SIG_UART0_TRANS			_VECTOR(23)
 #define SIG_USART0_TRANS		_VECTOR(23)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		24
 #define ANALOG_COMP_vect		_VECTOR(24)
 #define SIG_COMPARATOR			_VECTOR(24)
 
 /* ADC Conversion Complete */
+#define ADC_num 			25
 #define ADC_vect			_VECTOR(25)
 #define SIG_ADC				_VECTOR(25)
 
 /* EEPROM Ready */
+#define EE_READY_num 			26
 #define EE_READY_vect			_VECTOR(26)
 #define SIG_EEPROM_READY		_VECTOR(26)
 
 /* Timer/Counter3 Capture Event */
+#define TIMER3_CAPT_num 		27
 #define TIMER3_CAPT_vect		_VECTOR(27)
 #define SIG_INPUT_CAPTURE3		_VECTOR(27)
 
 /* Timer/Counter3 Compare Match A */
+#define TIMER3_COMPA_num 		28
 #define TIMER3_COMPA_vect		_VECTOR(28)
 #define SIG_OUTPUT_COMPARE3A		_VECTOR(28)
 
 /* Timer/Counter3 Compare Match B */
+#define TIMER3_COMPB_num 		29
 #define TIMER3_COMPB_vect		_VECTOR(29)
 #define SIG_OUTPUT_COMPARE3B		_VECTOR(29)
 
 /* Timer/Counter3 Compare Match C */
+#define TIMER3_COMPC_num 		30
 #define TIMER3_COMPC_vect		_VECTOR(30)
 #define SIG_OUTPUT_COMPARE3C		_VECTOR(30)
 
 /* Timer/Counter3 Overflow */
+#define TIMER3_OVF_num 			31
 #define TIMER3_OVF_vect			_VECTOR(31)
 #define SIG_OVERFLOW3			_VECTOR(31)
 
 /* USART1, Rx Complete */
+#define USART1_RX_num 			32
 #define USART1_RX_vect			_VECTOR(32)
 #define SIG_UART1_RECV			_VECTOR(32)
 #define SIG_USART1_RECV			_VECTOR(32)
 
 /* USART1, Data Register Empty */
+#define USART1_UDRE_num 		33
 #define USART1_UDRE_vect		_VECTOR(33)
 #define SIG_UART1_DATA			_VECTOR(33)
 #define SIG_USART1_DATA			_VECTOR(33)
 
 /* USART1, Tx Complete */
+#define USART1_TX_num 			34
 #define USART1_TX_vect			_VECTOR(34)
 #define SIG_UART1_TRANS			_VECTOR(34)
 #define SIG_USART1_TRANS		_VECTOR(34)
 
 /* 2-wire Serial Interface */
+#define TWI_num 			35
 #define TWI_vect			_VECTOR(35)
 #define SIG_2WIRE_SERIAL		_VECTOR(35)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			36
 #define SPM_READY_vect			_VECTOR(36)
 #define SIG_SPM_READY			_VECTOR(36)
 
@@ -1975,4 +2012,316 @@
 
 /* End Verbatim */
 
+/* Device Pin Definitions */
+#define DDR_AD0  	DDRA
+#define PORT_AD0 	PORTA
+#define PIN_AD0  	PINA
+#define AD0_IDX  	0
+
+#define DDR_AD1  	DDRA
+#define PORT_AD1 	PORTA
+#define PIN_AD1  	PINA
+#define AD1_IDX  	1
+
+#define DDR_AD2  	DDRA
+#define PORT_AD2 	PORTA
+#define PIN_AD2  	PINA
+#define AD2_IDX  	2
+
+#define DDR_AD3  	DDRA
+#define PORT_AD3 	PORTA
+#define PIN_AD3  	PINA
+#define AD3_IDX  	3
+
+#define DDR_AD4  	DDRA
+#define PORT_AD4 	PORTA
+#define PIN_AD4  	PINA
+#define AD4_IDX  	4
+
+#define DDR_AD5  	DDRA
+#define PORT_AD5 	PORTA
+#define PIN_AD5  	PINA
+#define AD5_IDX  	5
+
+#define DDR_AD6  	DDRA
+#define PORT_AD6 	PORTA
+#define PIN_AD6  	PINA
+#define AD6_IDX  	6
+
+#define DDR_AD7  	DDRA
+#define PORT_AD7 	PORTA
+#define PIN_AD7  	PINA
+#define AD7_IDX  	7
+
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	7
+
+#define DDR_OC1C  	DDRB
+#define PORT_OC1C 	PORTB
+#define PIN_OC1C  	PINB
+#define OC1C_IDX  	7
+
+#define DDR_A8  	DDRC
+#define PORT_A8 	PORTC
+#define PIN_A8  	PINC
+#define A8_IDX  	0
+
+#define DDR_A9  	DDRC
+#define PORT_A9 	PORTC
+#define PIN_A9  	PINC
+#define A9_IDX  	1
+
+#define DDR_A10  	DDRC
+#define PORT_A10 	PORTC
+#define PIN_A10  	PINC
+#define A10_IDX  	2
+
+#define DDR_A11  	DDRC
+#define PORT_A11 	PORTC
+#define PIN_A11  	PINC
+#define A11_IDX  	3
+
+#define DDR_A12  	DDRC
+#define PORT_A12 	PORTC
+#define PIN_A12  	PINC
+#define A12_IDX  	4
+
+#define DDR_A13  	DDRC
+#define PORT_A13 	PORTC
+#define PIN_A13  	PINC
+#define A13_IDX  	5
+
+#define DDR_A14  	DDRC
+#define PORT_A14 	PORTC
+#define PIN_A14  	PINC
+#define A14_IDX  	6
+
+#define DDR_A15  	DDRC
+#define PORT_A15 	PORTC
+#define PIN_A15  	PINC
+#define A15_IDX  	7
+
+#define DDR_SCL  	DDRD
+#define PORT_SCL 	PORTD
+#define PIN_SCL  	PIND
+#define SCL_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	0
+
+#define DDR_SDA  	DDRD
+#define PORT_SDA 	PORTD
+#define PIN_SDA  	PIND
+#define SDA_IDX  	1
+
+#define DDR_INT1  	DDRD
+#define PORT_INT1 	PORTD
+#define PIN_INT1  	PIND
+#define INT1_IDX  	1
+
+#define DDR_RXD1  	DDRD
+#define PORT_RXD1 	PORTD
+#define PIN_RXD1  	PIND
+#define RXD1_IDX  	2
+
+#define DDR_INT2  	DDRD
+#define PORT_INT2 	PORTD
+#define PIN_INT2  	PIND
+#define INT2_IDX  	2
+
+#define DDR_TXD1  	DDRD
+#define PORT_TXD1 	PORTD
+#define PIN_TXD1  	PIND
+#define TXD1_IDX  	3
+
+#define DDR_INT3  	DDRD
+#define PORT_INT3 	PORTD
+#define PIN_INT3  	PIND
+#define INT3_IDX  	3
+
+#define DDR_IC1  	DDRD
+#define PORT_IC1 	PORTD
+#define PIN_IC1  	PIND
+#define IC1_IDX  	4
+
+#define DDR_XCK1  	DDRD
+#define PORT_XCK1 	PORTD
+#define PIN_XCK1  	PIND
+#define XCK1_IDX  	5
+
+#define DDR_T1  	DDRD
+#define PORT_T1 	PORTD
+#define PIN_T1  	PIND
+#define T1_IDX  	6
+
+#define DDR_T2  	DDRD
+#define PORT_T2 	PORTD
+#define PIN_T2  	PIND
+#define T2_IDX  	7
+
+#define DDR_RXD0  	DDRE
+#define PORT_RXD0 	PORTE
+#define PIN_RXD0  	PINE
+#define RXD0_IDX  	0
+
+#define DDR_TXD0  	DDRE
+#define PORT_TXD0 	PORTE
+#define PIN_TXD0  	PINE
+#define TXD0_IDX  	1
+
+#define DDR_XCK0  	DDRE
+#define PORT_XCK0 	PORTE
+#define PIN_XCK0  	PINE
+#define XCK0_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_OC3A  	DDRE
+#define PORT_OC3A 	PORTE
+#define PIN_OC3A  	PINE
+#define OC3A_IDX  	3
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_OC3B  	DDRE
+#define PORT_OC3B 	PORTE
+#define PIN_OC3B  	PINE
+#define OC3B_IDX  	4
+
+#define DDR_INT4  	DDRE
+#define PORT_INT4 	PORTE
+#define PIN_INT4  	PINE
+#define INT4_IDX  	4
+
+#define DDR_OC3C  	DDRE
+#define PORT_OC3C 	PORTE
+#define PIN_OC3C  	PINE
+#define OC3C_IDX  	5
+
+#define DDR_INT5  	DDRE
+#define PORT_INT5 	PORTE
+#define PIN_INT5  	PINE
+#define INT5_IDX  	5
+
+#define DDR_T3  	DDRE
+#define PORT_T3 	PORTE
+#define PIN_T3  	PINE
+#define T3_IDX  	6
+
+#define DDR_INT6  	DDRE
+#define PORT_INT6 	PORTE
+#define PIN_INT6  	PINE
+#define INT6_IDX  	6
+
+#define DDR_IC3  	DDRE
+#define PORT_IC3 	PORTE
+#define PIN_IC3  	PINE
+#define IC3_IDX  	7
+
+#define DDR_INT7  	DDRE
+#define PORT_INT7 	PORTE
+#define PIN_INT7  	PINE
+#define INT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_WR  	DDRG
+#define PORT_WR 	PORTG
+#define PIN_WR  	PING
+#define WR_IDX  	0
+
+#define DDR_RD  	DDRG
+#define PORT_RD 	PORTG
+#define PIN_RD  	PING
+#define RD_IDX  	1
+
+#define DDR_ALE  	DDRG
+#define PORT_ALE 	PORTG
+#define PIN_ALE  	PING
+#define ALE_IDX  	2
+
+
 #endif  /* _AVR_IOCANXX_H_ */
Index: include/avr/iom165p.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iom165p.h,v
retrieving revision 1.9
diff -u -r1.9 iom165p.h
--- include/avr/iom165p.h	11 Feb 2009 17:53:35 -0000	1.9
+++ include/avr/iom165p.h	26 Mar 2009 20:10:27 -0000
@@ -1,5 +1,6 @@
 /* Copyright (c) 2004,2005,2006 Eric B. Weddington
    Copyright (c) 2006 Anatoly Sokolov <aesok@post.ru>
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -676,89 +677,113 @@
 /* Interrupt vectors */
 /* Vector 0 is the reset vector */
 /* External Interrupt Request 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* Pin Change Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Pin Change Interrupt Request 1 */
+#define PCINT1_num 			3
 #define PCINT1_vect			_VECTOR(3)
 #define SIG_PIN_CHANGE1			_VECTOR(3)
 
 /* Timer/Counter2 Compare Match */
+#define TIMER2_COMP_num 		4
 #define TIMER2_COMP_vect		_VECTOR(4)
 #define SIG_OUTPUT_COMPARE2		_VECTOR(4)
 
 /* Timer/Counter2 Overflow */
+#define TIMER2_OVF_num 			5
 #define TIMER2_OVF_vect			_VECTOR(5)
 #define SIG_OVERFLOW2			_VECTOR(5)
 
 /* Timer/Counter1 Capture Event */
+#define TIMER1_CAPT_num 		6
 #define TIMER1_CAPT_vect		_VECTOR(6)
 #define SIG_INPUT_CAPTURE1		_VECTOR(6)
 
 /* Timer/Counter1 Compare Match A */
+#define TIMER1_COMPA_num 		7
 #define TIMER1_COMPA_vect		_VECTOR(7)
 #define SIG_OUTPUT_COMPARE1A	_VECTOR(7)
 
 /* Timer/Counter Compare Match B */
+#define TIMER1_COMPB_num 		8
 #define TIMER1_COMPB_vect		_VECTOR(8)
 #define SIG_OUTPUT_COMPARE1B	_VECTOR(8)
 
 /* Timer/Counter1 Overflow */
+#define TIMER1_OVF_num 			9
 #define TIMER1_OVF_vect			_VECTOR(9)
 #define SIG_OVERFLOW1			_VECTOR(9)
 
 /* Timer/Counter0 Compare Match */
+#define TIMER0_COMP_num 		10
 #define TIMER0_COMP_vect		_VECTOR(10)
 #define SIG_OUTPUT_COMPARE0		_VECTOR(10)
 
 /* Timer/Counter0 Overflow */
+#define TIMER0_OVF_num 			11
 #define TIMER0_OVF_vect			_VECTOR(11)
 #define SIG_OVERFLOW0			_VECTOR(11)
 
 /* SPI Serial Transfer Complete */
+#define SPI_STC_num 			12
 #define SPI_STC_vect			_VECTOR(12)
 #define SIG_SPI				    _VECTOR(12)
 
 /* USART0, Rx Complete */
+#define USART0_RX_num 			13
 #define USART0_RX_vect			_VECTOR(13)
+#define USART_RX_num 			13
 #define USART_RX_vect			_VECTOR(13)  /* Alias */
 #define SIG_UART_RECV			_VECTOR(13)
 
 /* USART0 Data register Empty */
+#define USART0_UDRE_num 		14
 #define USART0_UDRE_vect		_VECTOR(14)
+#define USART_UDRE_num 		    14
 #define USART_UDRE_vect		    _VECTOR(14)  /* Alias */
 #define SIG_UART_DATA			_VECTOR(14)
 
 /* USART0, Tx Complete */
+#define USART0_TX_num 			15
 #define USART0_TX_vect			_VECTOR(15)
+#define USART_TX_num 			15
 #define USART_TX_vect			_VECTOR(15)  /* Alias */
 #define SIG_UART_TRANS			_VECTOR(15)
 
 /* USI Start Condition */
+#define USI_START_num 			16
 #define USI_START_vect			_VECTOR(16)
 #define SIG_USI_START			_VECTOR(16)
 
 /* USI Overflow */
+#define USI_OVERFLOW_num 		17
 #define USI_OVERFLOW_vect		_VECTOR(17)
 #define SIG_USI_OVERFLOW		_VECTOR(17)
 
 /* Analog Comparator */
+#define ANALOG_COMP_num 		18
 #define ANALOG_COMP_vect		_VECTOR(18)
 #define SIG_COMPARATOR			_VECTOR(18)
 
 /* ADC Conversion Complete */
+#define ADC_num 			19
 #define ADC_vect			_VECTOR(19)
 #define SIG_ADC				_VECTOR(19)
 
 /* EEPROM Ready */
+#define EE_READY_num 			20
 #define EE_READY_vect			_VECTOR(20)
 #define SIG_EEPROM_READY		_VECTOR(20)
 
 /* Store Program Memory Read */
+#define SPM_READY_num 			21
 #define SPM_READY_vect			_VECTOR(21)
 #define SIG_SPM_READY			_VECTOR(21)
 
@@ -819,4 +844,241 @@
 #define SIGNATURE_2 0x07
 
 
+/* Device Pin Definitions */
+#define DDR_SS  	DDRB
+#define PORT_SS 	PORTB
+#define PIN_SS  	PINB
+#define SS_IDX  	0
+
+#define DDR_PCINT8  	DDRB
+#define PORT_PCINT8 	PORTB
+#define PIN_PCINT8  	PINB
+#define PCINT8_IDX  	0
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	1
+
+#define DDR_PCINT9  	DDRB
+#define PORT_PCINT9 	PORTB
+#define PIN_PCINT9  	PINB
+#define PCINT9_IDX  	1
+
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	2
+
+#define DDR_PCINT10  	DDRB
+#define PORT_PCINT10 	PORTB
+#define PIN_PCINT10  	PINB
+#define PCINT10_IDX  	2
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	3
+
+#define DDR_PCINT11  	DDRB
+#define PORT_PCINT11 	PORTB
+#define PIN_PCINT11  	PINB
+#define PCINT11_IDX  	3
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	4
+
+#define DDR_PCINT12  	DDRB
+#define PORT_PCINT12 	PORTB
+#define PIN_PCINT12  	PINB
+#define PCINT12_IDX  	4
+
+#define DDR_OC1A  	DDRB
+#define PORT_OC1A 	PORTB
+#define PIN_OC1A  	PINB
+#define OC1A_IDX  	5
+
+#define DDR_PCINT13  	DDRB
+#define PORT_PCINT13 	PORTB
+#define PIN_PCINT13  	PINB
+#define PCINT13_IDX  	5
+
+#define DDR_OC1B  	DDRB
+#define PORT_OC1B 	PORTB
+#define PIN_OC1B  	PINB
+#define OC1B_IDX  	6
+
+#define DDR_PCINT14  	DDRB
+#define PORT_PCINT14 	PORTB
+#define PIN_PCINT14  	PINB
+#define PCINT14_IDX  	6
+
+#define DDR_OC2A  	DDRB
+#define PORT_OC2A 	PORTB
+#define PIN_OC2A  	PINB
+#define OC2A_IDX  	7
+
+#define DDR_PCINT15  	DDRB
+#define PORT_PCINT15 	PORTB
+#define PIN_PCINT15  	PINB
+#define PCINT15_IDX  	7
+
+#define DDR_ICP1  	DDRD
+#define PORT_ICP1 	PORTD
+#define PIN_ICP1  	PIND
+#define ICP1_IDX  	0
+
+#define DDR_INT0  	DDRD
+#define PORT_INT0 	PORTD
+#define PIN_INT0  	PIND
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRE
+#define PORT_RXD 	PORTE
+#define PIN_RXD  	PINE
+#define RXD_IDX  	0
+
+#define DDR_PCINT0  	DDRE
+#define PORT_PCINT0 	PORTE
+#define PIN_PCINT0  	PINE
+#define PCINT0_IDX  	0
+
+#define DDR_TXD  	DDRE
+#define PORT_TXD 	PORTE
+#define PIN_TXD  	PINE
+#define TXD_IDX  	1
+
+#define DDR_PCINT1  	DDRE
+#define PORT_PCINT1 	PORTE
+#define PIN_PCINT1  	PINE
+#define PCINT1_IDX  	1
+
+#define DDR_XCK  	DDRE
+#define PORT_XCK 	PORTE
+#define PIN_XCK  	PINE
+#define XCK_IDX  	2
+
+#define DDR_AIN0  	DDRE
+#define PORT_AIN0 	PORTE
+#define PIN_AIN0  	PINE
+#define AIN0_IDX  	2
+
+#define DDR_PCINT2  	DDRE
+#define PORT_PCINT2 	PORTE
+#define PIN_PCINT2  	PINE
+#define PCINT2_IDX  	2
+
+#define DDR_AIN1  	DDRE
+#define PORT_AIN1 	PORTE
+#define PIN_AIN1  	PINE
+#define AIN1_IDX  	3
+
+#define DDR_PCINT3  	DDRE
+#define PORT_PCINT3 	PORTE
+#define PIN_PCINT3  	PINE
+#define PCINT3_IDX  	3
+
+#define DDR_USCK  	DDRE
+#define PORT_USCK 	PORTE
+#define PIN_USCK  	PINE
+#define USCK_IDX  	4
+
+#define DDR_SCL  	DDRE
+#define PORT_SCL 	PORTE
+#define PIN_SCL  	PINE
+#define SCL_IDX  	4
+
+#define DDR_PCINT4  	DDRE
+#define PORT_PCINT4 	PORTE
+#define PIN_PCINT4  	PINE
+#define PCINT4_IDX  	4
+
+#define DDR_DI  	DDRE
+#define PORT_DI 	PORTE
+#define PIN_DI  	PINE
+#define DI_IDX  	5
+
+#define DDR_SDA  	DDRE
+#define PORT_SDA 	PORTE
+#define PIN_SDA  	PINE
+#define SDA_IDX  	5
+
+#define DDR_PCINT5  	DDRE
+#define PORT_PCINT5 	PORTE
+#define PIN_PCINT5  	PINE
+#define PCINT5_IDX  	5
+
+#define DDR_DO  	DDRE
+#define PORT_DO 	PORTE
+#define PIN_DO  	PINE
+#define DO_IDX  	6
+
+#define DDR_PCINT6  	DDRE
+#define PORT_PCINT6 	PORTE
+#define PIN_PCINT6  	PINE
+#define PCINT6_IDX  	6
+
+#define DDR_CLKO  	DDRE
+#define PORT_CLKO 	PORTE
+#define PIN_CLKO  	PINE
+#define CLKO_IDX  	7
+
+#define DDR_PCINT7  	DDRE
+#define PORT_PCINT7 	PORTE
+#define PIN_PCINT7  	PINE
+#define PCINT7_IDX  	7
+
+#define DDR_ADC0  	DDRF
+#define PORT_ADC0 	PORTF
+#define PIN_ADC0  	PINF
+#define ADC0_IDX  	0
+
+#define DDR_ADC1  	DDRF
+#define PORT_ADC1 	PORTF
+#define PIN_ADC1  	PINF
+#define ADC1_IDX  	1
+
+#define DDR_ADC2  	DDRF
+#define PORT_ADC2 	PORTF
+#define PIN_ADC2  	PINF
+#define ADC2_IDX  	2
+
+#define DDR_ADC3  	DDRF
+#define PORT_ADC3 	PORTF
+#define PIN_ADC3  	PINF
+#define ADC3_IDX  	3
+
+#define DDR_ADC4  	DDRF
+#define PORT_ADC4 	PORTF
+#define PIN_ADC4  	PINF
+#define ADC4_IDX  	4
+
+#define DDR_ADC5  	DDRF
+#define PORT_ADC5 	PORTF
+#define PIN_ADC5  	PINF
+#define ADC5_IDX  	5
+
+#define DDR_ADC6  	DDRF
+#define PORT_ADC6 	PORTF
+#define PIN_ADC6  	PINF
+#define ADC6_IDX  	6
+
+#define DDR_ADC7  	DDRF
+#define PORT_ADC7 	PORTF
+#define PIN_ADC7  	PINF
+#define ADC7_IDX  	7
+
+#define DDR_T1  	DDRG
+#define PORT_T1 	PORTG
+#define PIN_T1  	PING
+#define T1_IDX  	3
+
+#define DDR_T0  	DDRG
+#define PORT_T0 	PORTG
+#define PIN_T0  	PING
+#define T0_IDX  	4
+
+
 #endif /* _AVR_IOM165P_H_ */
Index: include/avr/iotn13.h
===================================================================
RCS file: /sources/avr-libc/avr-libc/include/avr/iotn13.h,v
retrieving revision 1.15
diff -u -r1.15 iotn13.h
--- include/avr/iotn13.h	11 Feb 2009 17:53:37 -0000	1.15
+++ include/avr/iotn13.h	26 Mar 2009 20:10:35 -0000
@@ -1,4 +1,5 @@
 /* Copyright (c) 2004, Theodore A. Roth
+   Copyright (c) 2009, Frédéric Nadeau
    All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
@@ -282,38 +283,47 @@
    10 0x0009 ADC ADC Conversion Complete */
 
 /* External Interrupt 0 */
+#define INT0_num 			1
 #define INT0_vect			_VECTOR(1)
 #define SIG_INTERRUPT0			_VECTOR(1)
 
 /* External Interrupt Request 0 */
+#define PCINT0_num 			2
 #define PCINT0_vect			_VECTOR(2)
 #define SIG_PIN_CHANGE0			_VECTOR(2)
 
 /* Timer/Counter0 Overflow */
+#define TIM0_OVF_num 			3
 #define TIM0_OVF_vect			_VECTOR(3)
 #define SIG_OVERFLOW0			_VECTOR(3)
 
 /* EEPROM Ready */
+#define EE_RDY_num 			4
 #define EE_RDY_vect			_VECTOR(4)
 #define SIG_EEPROM_READY		_VECTOR(4)
 
 /* Analog Comparator */
+#define ANA_COMP_num 			5
 #define ANA_COMP_vect			_VECTOR(5)
 #define SIG_COMPARATOR			_VECTOR(5)
 
 /* Timer/Counter Compare Match A */
+#define TIM0_COMPA_num 			6
 #define TIM0_COMPA_vect			_VECTOR(6)
 #define SIG_OUTPUT_COMPARE0A		_VECTOR(6)
 
 /* Timer/Counter Compare Match B */
+#define TIM0_COMPB_num 			7
 #define TIM0_COMPB_vect			_VECTOR(7)
 #define SIG_OUTPUT_COMPARE0B		_VECTOR(7)
 
 /* Watchdog Time-out */
+#define WDT_num 			8
 #define WDT_vect			_VECTOR(8)
 #define SIG_WATCHDOG_TIMEOUT		_VECTOR(8)
 
 /* ADC Conversion Complete */
+#define ADC_num 			9
 #define ADC_vect			_VECTOR(9)
 #define SIG_ADC				_VECTOR(9)
 
@@ -361,4 +371,116 @@
 #define SIGNATURE_2 0x07
 
 
+/* Device Pin Definitions */
+#define DDR_MOSI  	DDRB
+#define PORT_MOSI 	PORTB
+#define PIN_MOSI  	PINB
+#define MOSI_IDX  	0
+
+#define DDR_AIN0  	DDRB
+#define PORT_AIN0 	PORTB
+#define PIN_AIN0  	PINB
+#define AIN0_IDX  	0
+
+#define DDR_OC0A  	DDRB
+#define PORT_OC0A 	PORTB
+#define PIN_OC0A  	PINB
+#define OC0A_IDX  	0
+
+#define DDR_TXD  	DDRB
+#define PORT_TXD 	PORTB
+#define PIN_TXD  	PINB
+#define TXD_IDX  	0
+
+#define DDR_PCINT0  	DDRB
+#define PORT_PCINT0 	PORTB
+#define PIN_PCINT0  	PINB
+#define PCINT0_IDX  	0
+
+#define DDR_MISO  	DDRB
+#define PORT_MISO 	PORTB
+#define PIN_MISO  	PINB
+#define MISO_IDX  	1
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_AIN1  	DDRB
+#define PORT_AIN1 	PORTB
+#define PIN_AIN1  	PINB
+#define AIN1_IDX  	1
+
+#define DDR_OC0B  	DDRB
+#define PORT_OC0B 	PORTB
+#define PIN_OC0B  	PINB
+#define OC0B_IDX  	1
+
+#define DDR_INT0  	DDRB
+#define PORT_INT0 	PORTB
+#define PIN_INT0  	PINB
+#define INT0_IDX  	1
+
+#define DDR_RXD  	DDRB
+#define PORT_RXD 	PORTB
+#define PIN_RXD  	PINB
+#define RXD_IDX  	1
+
+#define DDR_PCINT1  	DDRB
+#define PORT_PCINT1 	PORTB
+#define PIN_PCINT1  	PINB
+#define PCINT1_IDX  	1
+
+#define DDR_SCK  	DDRB
+#define PORT_SCK 	PORTB
+#define PIN_SCK  	PINB
+#define SCK_IDX  	2
+
+#define DDR_ADC1  	DDRB
+#define PORT_ADC1 	PORTB
+#define PIN_ADC1  	PINB
+#define ADC1_IDX  	2
+
+#define DDR_T0  	DDRB
+#define PORT_T0 	PORTB
+#define PIN_T0  	PINB
+#define T0_IDX  	2
+
+#define DDR_PCINT2  	DDRB
+#define PORT_PCINT2 	PORTB
+#define PIN_PCINT2  	PINB
+#define PCINT2_IDX  	2
+
+#define DDR_PCINT3  	DDRB
+#define PORT_PCINT3 	PORTB
+#define PIN_PCINT3  	PINB
+#define PCINT3_IDX  	3
+
+#define DDR_ADC3  	DDRB
+#define PORT_ADC3 	PORTB
+#define PIN_ADC3  	PINB
+#define ADC3_IDX  	3
+
+#define DDR_PCINT4  	DDRB
+#define PORT_PCINT4 	PORTB
+#define PIN_PCINT4  	PINB
+#define PCINT4_IDX  	4
+
+#define DDR_ADC2  	DDRB
+#define PORT_ADC2 	PORTB
+#define PIN_ADC2  	PINB
+#define ADC2_IDX  	4
+
+#define DDR_PCINT5  	DDRB
+#define PORT_PCINT5 	PORTB
+#define PIN_PCINT5  	PINB
+#define PCINT5_IDX  	5
+
+#define DDR_ADC0  	DDRB
+#define PORT_ADC0 	PORTB
+#define PIN_ADC0  	PINB
+#define ADC0_IDX  	5
+
+
 #endif /* _AVR_IOTN13_H_*/
